EUSCI_A_CTLW0_TXADDR_OFS (reference) in projects: hal_ti-3.4.0

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Searched refs:EUSCI_A_CTLW0_TXADDR_OFS (Results 1 – 9 of 9) sorted by relevance

/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/driverlib/
D	uart.c	`178 BITBAND_PERI(EUSCI_A_CMSIS(moduleInstance)->CTLW0, EUSCI_A_CTLW0_TXADDR_OFS) = 1; in UART_transmitAddress()`
/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/inc/
D	msp432p401m_classic.h	`2481 #define UCTXADDR_OFS EUSCI_A_CTLW0_TXADDR_OFS /*!< UCTXADDR Offs…`
D	msp432p401r_classic.h	`2481 #define UCTXADDR_OFS EUSCI_A_CTLW0_TXADDR_OFS /*!< UCTXADDR Offs…`
D	msp432p401m.h	`3536 #define EUSCI_A_CTLW0_TXADDR_OFS ( 2) /*!< UCTXADDR Bit … macro`
D	msp432p401r.h	`3536 #define EUSCI_A_CTLW0_TXADDR_OFS ( 2) /*!< UCTXADDR Bit … macro`
D	msp432p4111.h	`3516 #define EUSCI_A_CTLW0_TXADDR_OFS ( 2) /*!< UCTXADDR Bit … macro`
D	msp432p411v.h	`3516 #define EUSCI_A_CTLW0_TXADDR_OFS ( 2) /*!< UCTXADDR Bit … macro`
D	msp432p411y.h	`3516 #define EUSCI_A_CTLW0_TXADDR_OFS ( 2) /*!< UCTXADDR Bit … macro`
D	msp432p4xx.h	`2926 #define EUSCI_A_CTLW0_TXADDR_OFS ( 2) /*!< UCTXADDR Bit … macro`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
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babblesim_ext_2G4_libPhyComv1-3.7.0
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