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Searched refs:CTL1 (Results 1 – 15 of 15) sorted by relevance

/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/startup_system_files/
Dsystem_msp432p401m.c112 divider = (CS->CTL1 & CS_CTL1_DIVM_MASK) >> CS_CTL1_DIVM_OFS; in SystemCoreClockUpdate()
114 source = CS->CTL1 & CS_CTL1_SELM_MASK; in SystemCoreClockUpdate()
286 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
288 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
296 CS->CTL1 = (CS->CTL1 & ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK)) | CS_CTL1_SELM__DCOCLK; in SystemInit()
309 while(PCM->CTL1 & PCM_CTL1_PMR_BUSY); in SystemInit()
311 while(PCM->CTL1 & PCM_CTL1_PMR_BUSY); in SystemInit()
319 CS->CTL1 = (CS->CTL1 & ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK)) | CS_CTL1_SELM__DCOCLK; in SystemInit()
332 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
334 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
[all …]
Dsystem_msp432p401r.c112 divider = (CS->CTL1 & CS_CTL1_DIVM_MASK) >> CS_CTL1_DIVM_OFS; in SystemCoreClockUpdate()
114 source = CS->CTL1 & CS_CTL1_SELM_MASK; in SystemCoreClockUpdate()
286 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
288 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
296 CS->CTL1 = (CS->CTL1 & ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK)) | CS_CTL1_SELM__DCOCLK; in SystemInit()
309 while(PCM->CTL1 & PCM_CTL1_PMR_BUSY); in SystemInit()
311 while(PCM->CTL1 & PCM_CTL1_PMR_BUSY); in SystemInit()
319 CS->CTL1 = (CS->CTL1 & ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK)) | CS_CTL1_SELM__DCOCLK; in SystemInit()
332 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
334 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
[all …]
Dsystem_msp432p4111.c112 divider = (CS->CTL1 & CS_CTL1_DIVM_MASK) >> CS_CTL1_DIVM_OFS; in SystemCoreClockUpdate()
114 source = CS->CTL1 & CS_CTL1_SELM_MASK; in SystemCoreClockUpdate()
296 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
298 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
306 …CS->CTL1 &= ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK) | CS_CTL1_SELM__DCOCLK; // Select MCLK as DC… in SystemInit()
318 while(PCM->CTL1 & PCM_CTL1_PMR_BUSY); in SystemInit()
320 while(PCM->CTL1 & PCM_CTL1_PMR_BUSY); in SystemInit()
328 …CS->CTL1 &= ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK) | CS_CTL1_SELM__DCOCLK; // Select MCLK as DC… in SystemInit()
340 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
342 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
[all …]
Dsystem_msp432p411v.c112 divider = (CS->CTL1 & CS_CTL1_DIVM_MASK) >> CS_CTL1_DIVM_OFS; in SystemCoreClockUpdate()
114 source = CS->CTL1 & CS_CTL1_SELM_MASK; in SystemCoreClockUpdate()
296 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
298 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
306 …CS->CTL1 &= ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK) | CS_CTL1_SELM__DCOCLK; // Select MCLK as DC… in SystemInit()
318 while(PCM->CTL1 & PCM_CTL1_PMR_BUSY); in SystemInit()
320 while(PCM->CTL1 & PCM_CTL1_PMR_BUSY); in SystemInit()
328 …CS->CTL1 &= ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK) | CS_CTL1_SELM__DCOCLK; // Select MCLK as DC… in SystemInit()
340 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
342 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
[all …]
Dsystem_msp432p411y.c112 divider = (CS->CTL1 & CS_CTL1_DIVM_MASK) >> CS_CTL1_DIVM_OFS; in SystemCoreClockUpdate()
114 source = CS->CTL1 & CS_CTL1_SELM_MASK; in SystemCoreClockUpdate()
296 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
298 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
306 …CS->CTL1 &= ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK) | CS_CTL1_SELM__DCOCLK; // Select MCLK as DC… in SystemInit()
318 while(PCM->CTL1 & PCM_CTL1_PMR_BUSY); in SystemInit()
320 while(PCM->CTL1 & PCM_CTL1_PMR_BUSY); in SystemInit()
328 …CS->CTL1 &= ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK) | CS_CTL1_SELM__DCOCLK; // Select MCLK as DC… in SystemInit()
340 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
342 while((PCM->CTL1 & PCM_CTL1_PMR_BUSY)); in SystemInit()
[all …]
/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/driverlib/
Dcomp_e.c130 COMP_E_CMSIS(comparator)->CTL1 = config->powerMode in COMP_E_initModule()
148 BITBAND_PERI(COMP_E_CMSIS(comparator)->CTL1, COMP_E_CTL1_MRVS_OFS) = 0; in COMP_E_setReferenceVoltage()
185 COMP_E_CMSIS(comparator)->CTL1 = (COMP_E_CMSIS(comparator)->CTL1 in COMP_E_setPowerMode()
191 BITBAND_PERI(COMP_E_CMSIS(comparator)->CTL1, COMP_E_CTL1_ON_OFS) = 1; in COMP_E_enableModule()
196 BITBAND_PERI(COMP_E_CMSIS(comparator)->CTL1, COMP_E_CTL1_ON_OFS) = 0; in COMP_E_disableModule()
201 BITBAND_PERI(COMP_E_CMSIS(comparator)->CTL1, COMP_E_CTL1_SHORT_OFS) = 1; in COMP_E_shortInputs()
206 BITBAND_PERI(COMP_E_CMSIS(comparator)->CTL1, COMP_E_CTL1_SHORT_OFS) = 0; in COMP_E_unshortInputs()
225 COMP_E_CMSIS(comparator)->CTL1 ^= COMP_E_CTL1_EX; // Toggle CEEX bit in COMP_E_swapIO()
230 return COMP_E_CMSIS(comparator)->CTL1 & COMP_E_CTL1_OUT; in COMP_E_outputValue()
269 BITBAND_PERI(COMP_E_CMSIS(comparator)->CTL1, COMP_E_CTL1_IES_OFS) = 1; in COMP_E_setInterruptEdgeDirection()
[all …]
Dadc14.c227 ADC14->CTL1 = (ADC14->CTL1 in ADC14_initModule()
240 ADC14->CTL1 = (ADC14->CTL1 & ~ADC14_CTL1_RES_MASK) | resolution; in ADC14_setResolution()
245 return ADC14->CTL1 & ADC14_CTL1_RES_MASK; in ADC14_getResolution()
333 ADC14->CTL1 = (ADC14->CTL1 & ~(ADC14_CTL1_CSTARTADD_MASK)) in ADC14_configureMultiSequenceMode()
359 ADC14->CTL1 = (ADC14->CTL1 & ~(ADC14_CTL1_CSTARTADD_MASK)) in ADC14_configureSingleSampleMode()
535 if(BITBAND_PERI(ADC14->CTL1, ADC14_CTL1_DF_OFS)) in ADC14_setComparatorWindowValue()
567 BITBAND_PERI(ADC14->CTL1, ADC14_CTL1_DF_OFS) = 0; in ADC14_setResultFormat()
570 BITBAND_PERI(ADC14->CTL1, ADC14_CTL1_DF_OFS) = 1; in ADC14_setResultFormat()
590 startAddr = (uint32_t*) _ctlRegs[(ADC14->CTL1 & ADC14_CTL1_CSTARTADD_MASK) in ADC14_getMultiSequenceResult()
646 BITBAND_PERI(ADC14->CTL1, ADC14_CTL1_REFBURST_OFS) = 1; in ADC14_enableReferenceBurst()
[all …]
Dcs.c238 CS->CTL1 = ((clockSourceDivider >> CS_ACLK_DIV_BITPOS) in CS_initClockSignal()
240 | (CS->CTL1 & ~(CS_CTL1_SELA_MASK | CS_CTL1_DIVA_MASK)); in CS_initClockSignal()
256 CS->CTL1 = ((clockSourceDivider >> CS_MCLK_DIV_BITPOS) in CS_initClockSignal()
258 | (CS->CTL1 & ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK)); in CS_initClockSignal()
273 CS->CTL1 = ((clockSourceDivider >> CS_SMCLK_DIV_BITPOS) in CS_initClockSignal()
275 | (CS->CTL1 & ~(CS_CTL1_DIVS_MASK | CS_CTL1_SELS_MASK)); in CS_initClockSignal()
290 CS->CTL1 = ((clockSourceDivider >> CS_HSMCLK_DIV_BITPOS) in CS_initClockSignal()
292 | (CS->CTL1 & ~(CS_CTL1_DIVHS_MASK | CS_CTL1_SELS_MASK)); in CS_initClockSignal()
312 BITBAND_PERI(CS->CTL1, CS_CTL1_SELB_OFS) = 0; in CS_initClockSignal()
314 BITBAND_PERI(CS->CTL1, CS_CTL1_SELB_OFS) = 1; in CS_initClockSignal()
[all …]
Dpcm.c86 while (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS)) in __PCM_setCoreVoltageLevelAdvanced()
265 while (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS)) in __PCM_setPowerModeAdvanced()
410 if (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS)) in PCM_shutdownDevice()
456 if (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS)) in PCM_gotoLPM0()
491 if (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS)) in PCM_gotoLPM3()
545 PCM->CTL1 = (PCM->CTL1 & ~(PCM_CTL0_KEY_MASK)) | PCM_KEY in PCM_enableRudeMode()
551 PCM->CTL1 = (PCM->CTL1 & ~(PCM_CTL0_KEY_MASK | PCM_CTL1_FORCE_LPM_ENTRY)) in PCM_disableRudeMode()
/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/inc/
Dmsp432p401m.h352 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
380 …__IO uint16_t CTL1; /*!< AES Accelerato… member
414 …__IO uint16_t CTL1; /*!< Comparator Con… member
461 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
980 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
Dmsp432p401r.h352 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
380 …__IO uint16_t CTL1; /*!< AES Accelerato… member
414 …__IO uint16_t CTL1; /*!< Comparator Con… member
461 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
980 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
Dmsp432p4111.h344 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
372 …__IO uint16_t CTL1; /*!< AES Accelerato… member
406 …__IO uint16_t CTL1; /*!< Comparator Con… member
453 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
1020 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
Dmsp432p411v.h344 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
372 …__IO uint16_t CTL1; /*!< AES Accelerato… member
406 …__IO uint16_t CTL1; /*!< Comparator Con… member
453 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
1020 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
Dmsp432p411y.h344 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
372 …__IO uint16_t CTL1; /*!< AES Accelerato… member
406 …__IO uint16_t CTL1; /*!< Comparator Con… member
453 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
1020 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
Dmsp432p4xx.h344 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
363 …__IO uint16_t CTL1; /*!< AES Accelerato… member
379 …__IO uint16_t CTL1; /*!< Comparator Con… member
408 …__IO uint32_t CTL1; /*!< Control 1 Regi… member
890 …__IO uint32_t CTL1; /*!< Control 1 Regi… member