Searched refs:CS (Results 1 – 12 of 12) sorted by relevance
/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/driverlib/ |
D | cs.c | 122 if (BITBAND_PERI(CS->IFG, CS_IFG_LFXTIFG_OFS)) in _CSComputeCLKFrequency() 126 if (BITBAND_PERI(CS->IFG, CS_IFG_LFXTIFG_OFS)) in _CSComputeCLKFrequency() 128 if (BITBAND_PERI(CS->CLKEN, CS_CLKEN_REFOFSEL_OFS)) in _CSComputeCLKFrequency() 138 if (BITBAND_PERI(CS->IFG, CS_IFG_HFXTIFG_OFS)) in _CSComputeCLKFrequency() 142 if (BITBAND_PERI(CS->IFG, CS_IFG_HFXTIFG_OFS)) in _CSComputeCLKFrequency() 144 if (BITBAND_PERI(CS->CLKEN, CS_CLKEN_REFOFSEL_OFS)) in _CSComputeCLKFrequency() 156 if (BITBAND_PERI(CS->CLKEN, CS_CLKEN_REFOFSEL_OFS)) in _CSComputeCLKFrequency() 178 switch (CS->CTL0 & CS_CTL0_DCORSEL_MASK) in _CSGetDOCFrequency() 218 CS->KEY = CS_KEY; in CS_initClockSignal() 234 while (!BITBAND_PERI(CS->STAT, CS_STAT_ACLK_READY_OFS)) in CS_initClockSignal() [all …]
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/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/startup_system_files/ |
D | system_msp432p401m.c | 112 divider = (CS->CTL1 & CS_CTL1_DIVM_MASK) >> CS_CTL1_DIVM_OFS; in SystemCoreClockUpdate() 114 source = CS->CTL1 & CS_CTL1_SELM_MASK; in SystemCoreClockUpdate() 119 if(BITBAND_PERI(CS->IFG, CS_IFG_LFXTIFG_OFS)) in SystemCoreClockUpdate() 122 CS->KEY = CS_KEY_VAL; in SystemCoreClockUpdate() 123 CS->CLRIFG |= CS_CLRIFG_CLR_LFXTIFG; in SystemCoreClockUpdate() 124 CS->KEY = 1; in SystemCoreClockUpdate() 126 if(BITBAND_PERI(CS->IFG, CS_IFG_LFXTIFG_OFS)) in SystemCoreClockUpdate() 128 if(BITBAND_PERI(CS->CLKEN, CS_CLKEN_REFOFSEL_OFS)) in SystemCoreClockUpdate() 151 if (BITBAND_PERI(CS->CLKEN, CS_CLKEN_REFOFSEL_OFS)) in SystemCoreClockUpdate() 161 dcoTune = (CS->CTL0 & CS_CTL0_DCOTUNE_MASK) >> CS_CTL0_DCOTUNE_OFS; in SystemCoreClockUpdate() [all …]
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D | system_msp432p401r.c | 112 divider = (CS->CTL1 & CS_CTL1_DIVM_MASK) >> CS_CTL1_DIVM_OFS; in SystemCoreClockUpdate() 114 source = CS->CTL1 & CS_CTL1_SELM_MASK; in SystemCoreClockUpdate() 119 if(BITBAND_PERI(CS->IFG, CS_IFG_LFXTIFG_OFS)) in SystemCoreClockUpdate() 122 CS->KEY = CS_KEY_VAL; in SystemCoreClockUpdate() 123 CS->CLRIFG |= CS_CLRIFG_CLR_LFXTIFG; in SystemCoreClockUpdate() 124 CS->KEY = 1; in SystemCoreClockUpdate() 126 if(BITBAND_PERI(CS->IFG, CS_IFG_LFXTIFG_OFS)) in SystemCoreClockUpdate() 128 if(BITBAND_PERI(CS->CLKEN, CS_CLKEN_REFOFSEL_OFS)) in SystemCoreClockUpdate() 151 if (BITBAND_PERI(CS->CLKEN, CS_CLKEN_REFOFSEL_OFS)) in SystemCoreClockUpdate() 161 dcoTune = (CS->CTL0 & CS_CTL0_DCOTUNE_MASK) >> CS_CTL0_DCOTUNE_OFS; in SystemCoreClockUpdate() [all …]
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D | system_msp432p4111.c | 112 divider = (CS->CTL1 & CS_CTL1_DIVM_MASK) >> CS_CTL1_DIVM_OFS; in SystemCoreClockUpdate() 114 source = CS->CTL1 & CS_CTL1_SELM_MASK; in SystemCoreClockUpdate() 119 if(BITBAND_PERI(CS->IFG, CS_IFG_LFXTIFG_OFS)) in SystemCoreClockUpdate() 122 CS->KEY = CS_KEY_VAL; in SystemCoreClockUpdate() 123 CS->CLRIFG |= CS_CLRIFG_CLR_LFXTIFG; in SystemCoreClockUpdate() 124 CS->KEY = 1; in SystemCoreClockUpdate() 126 if(BITBAND_PERI(CS->IFG, CS_IFG_LFXTIFG_OFS)) in SystemCoreClockUpdate() 128 if(BITBAND_PERI(CS->CLKEN, CS_CLKEN_REFOFSEL_OFS)) in SystemCoreClockUpdate() 151 if (BITBAND_PERI(CS->CLKEN, CS_CLKEN_REFOFSEL_OFS)) in SystemCoreClockUpdate() 161 dcoTune = (CS->CTL0 & CS_CTL0_DCOTUNE_MASK) >> CS_CTL0_DCOTUNE_OFS; in SystemCoreClockUpdate() [all …]
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D | system_msp432p411v.c | 112 divider = (CS->CTL1 & CS_CTL1_DIVM_MASK) >> CS_CTL1_DIVM_OFS; in SystemCoreClockUpdate() 114 source = CS->CTL1 & CS_CTL1_SELM_MASK; in SystemCoreClockUpdate() 119 if(BITBAND_PERI(CS->IFG, CS_IFG_LFXTIFG_OFS)) in SystemCoreClockUpdate() 122 CS->KEY = CS_KEY_VAL; in SystemCoreClockUpdate() 123 CS->CLRIFG |= CS_CLRIFG_CLR_LFXTIFG; in SystemCoreClockUpdate() 124 CS->KEY = 1; in SystemCoreClockUpdate() 126 if(BITBAND_PERI(CS->IFG, CS_IFG_LFXTIFG_OFS)) in SystemCoreClockUpdate() 128 if(BITBAND_PERI(CS->CLKEN, CS_CLKEN_REFOFSEL_OFS)) in SystemCoreClockUpdate() 151 if (BITBAND_PERI(CS->CLKEN, CS_CLKEN_REFOFSEL_OFS)) in SystemCoreClockUpdate() 161 dcoTune = (CS->CTL0 & CS_CTL0_DCOTUNE_MASK) >> CS_CTL0_DCOTUNE_OFS; in SystemCoreClockUpdate() [all …]
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D | system_msp432p411y.c | 112 divider = (CS->CTL1 & CS_CTL1_DIVM_MASK) >> CS_CTL1_DIVM_OFS; in SystemCoreClockUpdate() 114 source = CS->CTL1 & CS_CTL1_SELM_MASK; in SystemCoreClockUpdate() 119 if(BITBAND_PERI(CS->IFG, CS_IFG_LFXTIFG_OFS)) in SystemCoreClockUpdate() 122 CS->KEY = CS_KEY_VAL; in SystemCoreClockUpdate() 123 CS->CLRIFG |= CS_CLRIFG_CLR_LFXTIFG; in SystemCoreClockUpdate() 124 CS->KEY = 1; in SystemCoreClockUpdate() 126 if(BITBAND_PERI(CS->IFG, CS_IFG_LFXTIFG_OFS)) in SystemCoreClockUpdate() 128 if(BITBAND_PERI(CS->CLKEN, CS_CLKEN_REFOFSEL_OFS)) in SystemCoreClockUpdate() 151 if (BITBAND_PERI(CS->CLKEN, CS_CLKEN_REFOFSEL_OFS)) in SystemCoreClockUpdate() 161 dcoTune = (CS->CTL0 & CS_CTL0_DCOTUNE_MASK) >> CS_CTL0_DCOTUNE_OFS; in SystemCoreClockUpdate() [all …]
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/hal_ti-3.4.0/simplelink/source/ti/devices/msp432p4xx/inc/ |
D | msp432p401m.h | 1327 #define CS ((CS_Type *) CS_BASE) macro
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D | msp432p401r.h | 1327 #define CS ((CS_Type *) CS_BASE) macro
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D | msp432p4111.h | 1380 #define CS ((CS_Type *) CS_BASE) macro
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D | msp432p411v.h | 1380 #define CS ((CS_Type *) CS_BASE) macro
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D | msp432p411y.h | 1380 #define CS ((CS_Type *) CS_BASE) macro
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D | msp432p4xx.h | 1232 #define CS ((CS_Type *) CS_BASE) macro
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