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Searched refs:XSPI_WPTCR_DHQC_Msk (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u595xx.h13154 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10… macro
13155 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Dela…
13607 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
14018 #define HSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
Dstm32u5a5xx.h13603 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10… macro
13604 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Dela…
14056 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
14467 #define HSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
Dstm32u5f7xx.h14652 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10… macro
14653 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Dela…
15105 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
15516 #define HSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
Dstm32u545xx.h12204 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10… macro
12205 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Dela…
12623 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
Dstm32u535xx.h11804 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10… macro
11805 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Dela…
12223 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
Dstm32u599xx.h16873 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10… macro
16874 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Dela…
17326 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
17737 #define HSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
Dstm32u5g7xx.h15101 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10… macro
15102 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Dela…
15554 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
15965 #define HSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
Dstm32u5f9xx.h17778 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10… macro
17779 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Dela…
18231 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
18642 #define HSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
Dstm32u5a9xx.h17322 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10… macro
17323 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Dela…
17775 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
18186 #define HSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
Dstm32u5g9xx.h18227 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10… macro
18228 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Dela…
18680 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
19091 #define HSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
Dstm32u575xx.h12839 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10… macro
12840 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Dela…
13258 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
Dstm32u585xx.h13288 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10… macro
13289 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Dela…
13707 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h11112 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x100… macro
11113 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Delay…
11524 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
Dstm32h562xx.h11838 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x100… macro
11839 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Delay…
12250 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
Dstm32h533xx.h11521 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x100… macro
11522 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Delay…
11933 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
Dstm32h573xx.h14331 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x100… macro
14332 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Delay…
14743 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
Dstm32h563xx.h13922 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x100… macro
13923 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Delay…
14334 #define OCTOSPI_WPTCR_DHQC_Msk XSPI_WPTCR_DHQC_Msk /*!< 0x10…
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h13447 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10000000 */ macro
13448 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Delay Hold Quart…
Dstm32h7s7xx.h14481 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10000000 */ macro
14482 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Delay Hold Quart…
Dstm32h7s3xx.h14079 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10000000 */ macro
14080 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Delay Hold Quart…
Dstm32h7r7xx.h13847 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10000000 */ macro
13848 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Delay Hold Quart…
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h39485 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10000000 */ macro
39486 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Delay Hold Quart…
Dstm32n657xx.h41124 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10000000 */ macro
41125 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Delay Hold Quart…
Dstm32n655xx.h40735 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10000000 */ macro
40736 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Delay Hold Quart…
Dstm32n647xx.h39874 #define XSPI_WPTCR_DHQC_Msk (0x1UL << XSPI_WPTCR_DHQC_Pos) /*!< 0x10000000 */ macro
39875 #define XSPI_WPTCR_DHQC XSPI_WPTCR_DHQC_Msk /*!< Delay Hold Quart…