Home
last modified time | relevance | path

Searched refs:XSPI_WPTCR_DCYC_Pos (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u595xx.h13150 #define XSPI_WPTCR_DCYC_Pos (0U) macro
13151 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x00…
13603 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
14014 #define HSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
Dstm32u5a5xx.h13599 #define XSPI_WPTCR_DCYC_Pos (0U) macro
13600 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x00…
14052 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
14463 #define HSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
Dstm32u5f7xx.h14648 #define XSPI_WPTCR_DCYC_Pos (0U) macro
14649 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x00…
15101 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
15512 #define HSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
Dstm32u545xx.h12200 #define XSPI_WPTCR_DCYC_Pos (0U) macro
12201 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x00…
12619 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
Dstm32u535xx.h11800 #define XSPI_WPTCR_DCYC_Pos (0U) macro
11801 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x00…
12219 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
Dstm32u599xx.h16869 #define XSPI_WPTCR_DCYC_Pos (0U) macro
16870 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x00…
17322 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
17733 #define HSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
Dstm32u5g7xx.h15097 #define XSPI_WPTCR_DCYC_Pos (0U) macro
15098 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x00…
15550 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
15961 #define HSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
Dstm32u5f9xx.h17774 #define XSPI_WPTCR_DCYC_Pos (0U) macro
17775 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x00…
18227 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
18638 #define HSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
Dstm32u5a9xx.h17318 #define XSPI_WPTCR_DCYC_Pos (0U) macro
17319 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x00…
17771 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
18182 #define HSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
Dstm32u5g9xx.h18223 #define XSPI_WPTCR_DCYC_Pos (0U) macro
18224 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x00…
18676 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
19087 #define HSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
Dstm32u575xx.h12835 #define XSPI_WPTCR_DCYC_Pos (0U) macro
12836 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x00…
13254 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
Dstm32u585xx.h13284 #define XSPI_WPTCR_DCYC_Pos (0U) macro
13285 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x00…
13703 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h11108 #define XSPI_WPTCR_DCYC_Pos (0U) macro
11109 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x000…
11520 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
Dstm32h562xx.h11834 #define XSPI_WPTCR_DCYC_Pos (0U) macro
11835 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x000…
12246 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
Dstm32h533xx.h11517 #define XSPI_WPTCR_DCYC_Pos (0U) macro
11518 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x000…
11929 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
Dstm32h573xx.h14327 #define XSPI_WPTCR_DCYC_Pos (0U) macro
14328 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x000…
14739 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
Dstm32h563xx.h13918 #define XSPI_WPTCR_DCYC_Pos (0U) macro
13919 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x000…
14330 #define OCTOSPI_WPTCR_DCYC_Pos XSPI_WPTCR_DCYC_Pos
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h13443 #define XSPI_WPTCR_DCYC_Pos (0U) macro
13444 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x0000001F */
Dstm32h7s7xx.h14477 #define XSPI_WPTCR_DCYC_Pos (0U) macro
14478 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x0000001F */
Dstm32h7s3xx.h14075 #define XSPI_WPTCR_DCYC_Pos (0U) macro
14076 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x0000001F */
Dstm32h7r7xx.h13843 #define XSPI_WPTCR_DCYC_Pos (0U) macro
13844 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x0000001F */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h39481 #define XSPI_WPTCR_DCYC_Pos (0U) macro
39482 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x0000001F */
Dstm32n657xx.h41120 #define XSPI_WPTCR_DCYC_Pos (0U) macro
41121 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x0000001F */
Dstm32n655xx.h40731 #define XSPI_WPTCR_DCYC_Pos (0U) macro
40732 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x0000001F */
Dstm32n647xx.h39870 #define XSPI_WPTCR_DCYC_Pos (0U) macro
39871 #define XSPI_WPTCR_DCYC_Msk (0x1FUL << XSPI_WPTCR_DCYC_Pos) /*!< 0x0000001F */