/hal_stm32-latest/stm32cube/stm32u5xx/soc/ |
D | stm32u595xx.h | 13114 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 13115 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00… 13567 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos 13978 #define HSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
D | stm32u5a5xx.h | 13563 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 13564 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00… 14016 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos 14427 #define HSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
D | stm32u5f7xx.h | 14612 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 14613 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00… 15065 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos 15476 #define HSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
D | stm32u545xx.h | 12164 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 12165 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00… 12583 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
D | stm32u535xx.h | 11764 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 11765 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00… 12183 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
D | stm32u599xx.h | 16833 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 16834 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00… 17286 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos 17697 #define HSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
D | stm32u5g7xx.h | 15061 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 15062 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00… 15514 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos 15925 #define HSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
D | stm32u5f9xx.h | 17738 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 17739 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00… 18191 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos 18602 #define HSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
D | stm32u5a9xx.h | 17282 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 17283 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00… 17735 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos 18146 #define HSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
D | stm32u5g9xx.h | 18187 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 18188 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00… 18640 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos 19051 #define HSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
D | stm32u575xx.h | 12799 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 12800 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00… 13218 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
D | stm32u585xx.h | 13248 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 13249 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00… 13667 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
/hal_stm32-latest/stm32cube/stm32h5xx/soc/ |
D | stm32h523xx.h | 11072 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 11073 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x000… 11484 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
D | stm32h562xx.h | 11798 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 11799 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x000… 12210 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
D | stm32h533xx.h | 11481 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 11482 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x000… 11893 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
D | stm32h573xx.h | 14291 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 14292 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x000… 14703 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
D | stm32h563xx.h | 13882 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 13883 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x000… 14294 #define OCTOSPI_WPCCR_ADDTR_Pos XSPI_WPCCR_ADDTR_Pos
|
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/ |
D | stm32h7r3xx.h | 13407 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 13408 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00000800 */
|
D | stm32h7s7xx.h | 14441 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 14442 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00000800 */
|
D | stm32h7s3xx.h | 14039 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 14040 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00000800 */
|
D | stm32h7r7xx.h | 13807 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 13808 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00000800 */
|
/hal_stm32-latest/stm32cube/stm32n6xx/soc/ |
D | stm32n645xx.h | 39445 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 39446 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00000800 */
|
D | stm32n657xx.h | 41084 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 41085 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00000800 */
|
D | stm32n655xx.h | 40695 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 40696 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00000800 */
|
D | stm32n647xx.h | 39834 #define XSPI_WPCCR_ADDTR_Pos (11U) macro 39835 #define XSPI_WPCCR_ADDTR_Msk (0x1UL << XSPI_WPCCR_ADDTR_Pos) /*!< 0x00000800 */
|