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Searched refs:XSPI_WPCCR_ABDTR_Pos (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u595xx.h13128 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
13129 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00…
13581 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
13992 #define HSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
Dstm32u5a5xx.h13577 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
13578 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00…
14030 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
14441 #define HSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
Dstm32u5f7xx.h14626 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
14627 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00…
15079 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
15490 #define HSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
Dstm32u545xx.h12178 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
12179 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00…
12597 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
Dstm32u535xx.h11778 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
11779 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00…
12197 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
Dstm32u599xx.h16847 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
16848 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00…
17300 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
17711 #define HSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
Dstm32u5g7xx.h15075 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
15076 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00…
15528 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
15939 #define HSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
Dstm32u5f9xx.h17752 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
17753 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00…
18205 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
18616 #define HSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
Dstm32u5a9xx.h17296 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
17297 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00…
17749 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
18160 #define HSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
Dstm32u5g9xx.h18201 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
18202 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00…
18654 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
19065 #define HSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
Dstm32u575xx.h12813 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
12814 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00…
13232 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
Dstm32u585xx.h13262 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
13263 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00…
13681 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h11086 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
11087 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x000…
11498 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
Dstm32h562xx.h11812 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
11813 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x000…
12224 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
Dstm32h533xx.h11495 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
11496 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x000…
11907 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
Dstm32h573xx.h14305 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
14306 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x000…
14717 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
Dstm32h563xx.h13896 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
13897 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x000…
14308 #define OCTOSPI_WPCCR_ABDTR_Pos XSPI_WPCCR_ABDTR_Pos
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h13421 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
13422 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00080000 */
Dstm32h7s7xx.h14455 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
14456 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00080000 */
Dstm32h7s3xx.h14053 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
14054 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00080000 */
Dstm32h7r7xx.h13821 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
13822 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00080000 */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h39459 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
39460 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00080000 */
Dstm32n657xx.h41098 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
41099 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00080000 */
Dstm32n655xx.h40709 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
40710 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00080000 */
Dstm32n647xx.h39848 #define XSPI_WPCCR_ABDTR_Pos (19U) macro
39849 #define XSPI_WPCCR_ABDTR_Msk (0x1UL << XSPI_WPCCR_ABDTR_Pos) /*!< 0x00080000 */