Home
last modified time | relevance | path

Searched refs:XSPI_WCCR_ABDTR_Pos (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u595xx.h13205 #define XSPI_WCCR_ABDTR_Pos (19U) macro
13206 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00…
13658 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
14069 #define HSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
Dstm32u5a5xx.h13654 #define XSPI_WCCR_ABDTR_Pos (19U) macro
13655 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00…
14107 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
14518 #define HSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
Dstm32u5f7xx.h14703 #define XSPI_WCCR_ABDTR_Pos (19U) macro
14704 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00…
15156 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
15567 #define HSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
Dstm32u545xx.h12255 #define XSPI_WCCR_ABDTR_Pos (19U) macro
12256 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00…
12674 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
Dstm32u535xx.h11855 #define XSPI_WCCR_ABDTR_Pos (19U) macro
11856 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00…
12274 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
Dstm32u599xx.h16924 #define XSPI_WCCR_ABDTR_Pos (19U) macro
16925 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00…
17377 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
17788 #define HSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
Dstm32u5g7xx.h15152 #define XSPI_WCCR_ABDTR_Pos (19U) macro
15153 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00…
15605 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
16016 #define HSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
Dstm32u5f9xx.h17829 #define XSPI_WCCR_ABDTR_Pos (19U) macro
17830 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00…
18282 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
18693 #define HSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
Dstm32u5a9xx.h17373 #define XSPI_WCCR_ABDTR_Pos (19U) macro
17374 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00…
17826 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
18237 #define HSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
Dstm32u5g9xx.h18278 #define XSPI_WCCR_ABDTR_Pos (19U) macro
18279 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00…
18731 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
19142 #define HSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
Dstm32u575xx.h12890 #define XSPI_WCCR_ABDTR_Pos (19U) macro
12891 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00…
13309 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
Dstm32u585xx.h13339 #define XSPI_WCCR_ABDTR_Pos (19U) macro
13340 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00…
13758 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h11163 #define XSPI_WCCR_ABDTR_Pos (19U) macro
11164 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x000…
11575 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
Dstm32h562xx.h11889 #define XSPI_WCCR_ABDTR_Pos (19U) macro
11890 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x000…
12301 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
Dstm32h533xx.h11572 #define XSPI_WCCR_ABDTR_Pos (19U) macro
11573 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x000…
11984 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
Dstm32h573xx.h14382 #define XSPI_WCCR_ABDTR_Pos (19U) macro
14383 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x000…
14794 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
Dstm32h563xx.h13973 #define XSPI_WCCR_ABDTR_Pos (19U) macro
13974 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x000…
14385 #define OCTOSPI_WCCR_ABDTR_Pos XSPI_WCCR_ABDTR_Pos
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h13498 #define XSPI_WCCR_ABDTR_Pos (19U) macro
13499 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00080000 */
Dstm32h7s7xx.h14532 #define XSPI_WCCR_ABDTR_Pos (19U) macro
14533 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00080000 */
Dstm32h7s3xx.h14130 #define XSPI_WCCR_ABDTR_Pos (19U) macro
14131 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00080000 */
Dstm32h7r7xx.h13898 #define XSPI_WCCR_ABDTR_Pos (19U) macro
13899 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00080000 */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h39536 #define XSPI_WCCR_ABDTR_Pos (19U) macro
39537 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00080000 */
Dstm32n657xx.h41175 #define XSPI_WCCR_ABDTR_Pos (19U) macro
41176 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00080000 */
Dstm32n655xx.h40786 #define XSPI_WCCR_ABDTR_Pos (19U) macro
40787 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00080000 */
Dstm32n647xx.h39925 #define XSPI_WCCR_ABDTR_Pos (19U) macro
39926 #define XSPI_WCCR_ABDTR_Msk (0x1UL << XSPI_WCCR_ABDTR_Pos) /*!< 0x00080000 */