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Searched refs:XSPI_TCR_DCYC_Pos (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u595xx.h13068 #define XSPI_TCR_DCYC_Pos (0U) macro
13069 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x00…
13521 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
13932 #define HSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
Dstm32u5a5xx.h13517 #define XSPI_TCR_DCYC_Pos (0U) macro
13518 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x00…
13970 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
14381 #define HSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
Dstm32u5f7xx.h14566 #define XSPI_TCR_DCYC_Pos (0U) macro
14567 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x00…
15019 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
15430 #define HSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
Dstm32u545xx.h12118 #define XSPI_TCR_DCYC_Pos (0U) macro
12119 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x00…
12537 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
Dstm32u535xx.h11718 #define XSPI_TCR_DCYC_Pos (0U) macro
11719 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x00…
12137 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
Dstm32u599xx.h16787 #define XSPI_TCR_DCYC_Pos (0U) macro
16788 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x00…
17240 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
17651 #define HSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
Dstm32u5g7xx.h15015 #define XSPI_TCR_DCYC_Pos (0U) macro
15016 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x00…
15468 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
15879 #define HSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
Dstm32u5f9xx.h17692 #define XSPI_TCR_DCYC_Pos (0U) macro
17693 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x00…
18145 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
18556 #define HSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
Dstm32u5a9xx.h17236 #define XSPI_TCR_DCYC_Pos (0U) macro
17237 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x00…
17689 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
18100 #define HSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
Dstm32u5g9xx.h18141 #define XSPI_TCR_DCYC_Pos (0U) macro
18142 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x00…
18594 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
19005 #define HSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
Dstm32u575xx.h12753 #define XSPI_TCR_DCYC_Pos (0U) macro
12754 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x00…
13172 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
Dstm32u585xx.h13202 #define XSPI_TCR_DCYC_Pos (0U) macro
13203 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x00…
13621 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h11026 #define XSPI_TCR_DCYC_Pos (0U) macro
11027 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x000…
11438 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
Dstm32h562xx.h11752 #define XSPI_TCR_DCYC_Pos (0U) macro
11753 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x000…
12164 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
Dstm32h533xx.h11435 #define XSPI_TCR_DCYC_Pos (0U) macro
11436 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x000…
11847 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
Dstm32h573xx.h14245 #define XSPI_TCR_DCYC_Pos (0U) macro
14246 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x000…
14657 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
Dstm32h563xx.h13836 #define XSPI_TCR_DCYC_Pos (0U) macro
13837 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x000…
14248 #define OCTOSPI_TCR_DCYC_Pos XSPI_TCR_DCYC_Pos
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h13361 #define XSPI_TCR_DCYC_Pos (0U) macro
13362 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x0000001F */
Dstm32h7s7xx.h14395 #define XSPI_TCR_DCYC_Pos (0U) macro
14396 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x0000001F */
Dstm32h7s3xx.h13993 #define XSPI_TCR_DCYC_Pos (0U) macro
13994 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x0000001F */
Dstm32h7r7xx.h13761 #define XSPI_TCR_DCYC_Pos (0U) macro
13762 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x0000001F */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h39399 #define XSPI_TCR_DCYC_Pos (0U) macro
39400 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x0000001F */
Dstm32n657xx.h41038 #define XSPI_TCR_DCYC_Pos (0U) macro
41039 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x0000001F */
Dstm32n655xx.h40649 #define XSPI_TCR_DCYC_Pos (0U) macro
40650 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x0000001F */
Dstm32n647xx.h39788 #define XSPI_TCR_DCYC_Pos (0U) macro
39789 #define XSPI_TCR_DCYC_Msk (0x1FUL << XSPI_TCR_DCYC_Pos) /*!< 0x0000001F */