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Searched refs:XSPI_SR_TEF_Pos (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u595xx.h12942 #define XSPI_SR_TEF_Pos (0U) macro
12943 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00…
13395 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
13806 #define HSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
Dstm32u5a5xx.h13391 #define XSPI_SR_TEF_Pos (0U) macro
13392 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00…
13844 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
14255 #define HSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
Dstm32u5f7xx.h14440 #define XSPI_SR_TEF_Pos (0U) macro
14441 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00…
14893 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
15304 #define HSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
Dstm32u545xx.h11992 #define XSPI_SR_TEF_Pos (0U) macro
11993 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00…
12411 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
Dstm32u535xx.h11592 #define XSPI_SR_TEF_Pos (0U) macro
11593 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00…
12011 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
Dstm32u599xx.h16661 #define XSPI_SR_TEF_Pos (0U) macro
16662 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00…
17114 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
17525 #define HSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
Dstm32u5g7xx.h14889 #define XSPI_SR_TEF_Pos (0U) macro
14890 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00…
15342 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
15753 #define HSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
Dstm32u5f9xx.h17566 #define XSPI_SR_TEF_Pos (0U) macro
17567 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00…
18019 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
18430 #define HSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
Dstm32u5a9xx.h17110 #define XSPI_SR_TEF_Pos (0U) macro
17111 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00…
17563 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
17974 #define HSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
Dstm32u5g9xx.h18015 #define XSPI_SR_TEF_Pos (0U) macro
18016 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00…
18468 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
18879 #define HSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
Dstm32u575xx.h12627 #define XSPI_SR_TEF_Pos (0U) macro
12628 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00…
13046 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
Dstm32u585xx.h13076 #define XSPI_SR_TEF_Pos (0U) macro
13077 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00…
13495 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h10900 #define XSPI_SR_TEF_Pos (0U) macro
10901 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x000…
11312 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
Dstm32h562xx.h11626 #define XSPI_SR_TEF_Pos (0U) macro
11627 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x000…
12038 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
Dstm32h533xx.h11309 #define XSPI_SR_TEF_Pos (0U) macro
11310 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x000…
11721 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
Dstm32h573xx.h14119 #define XSPI_SR_TEF_Pos (0U) macro
14120 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x000…
14531 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
Dstm32h563xx.h13710 #define XSPI_SR_TEF_Pos (0U) macro
13711 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x000…
14122 #define OCTOSPI_SR_TEF_Pos XSPI_SR_TEF_Pos
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h13238 #define XSPI_SR_TEF_Pos (0U) macro
13239 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00000001 */
Dstm32h7s7xx.h14272 #define XSPI_SR_TEF_Pos (0U) macro
14273 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00000001 */
Dstm32h7s3xx.h13870 #define XSPI_SR_TEF_Pos (0U) macro
13871 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00000001 */
Dstm32h7r7xx.h13638 #define XSPI_SR_TEF_Pos (0U) macro
13639 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h39276 #define XSPI_SR_TEF_Pos (0U) macro
39277 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00000001 */
Dstm32n657xx.h40915 #define XSPI_SR_TEF_Pos (0U) macro
40916 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00000001 */
Dstm32n655xx.h40526 #define XSPI_SR_TEF_Pos (0U) macro
40527 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00000001 */
Dstm32n647xx.h39665 #define XSPI_SR_TEF_Pos (0U) macro
39666 #define XSPI_SR_TEF_Msk (0x1UL << XSPI_SR_TEF_Pos) /*!< 0x00000001 */