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Searched refs:XSPI_DCR4_REFRESH_Pos (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u595xx.h12937 #define XSPI_DCR4_REFRESH_Pos (0U) macro
12938 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFF…
13390 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
13801 #define HSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
Dstm32u5a5xx.h13386 #define XSPI_DCR4_REFRESH_Pos (0U) macro
13387 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFF…
13839 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
14250 #define HSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
Dstm32u5f7xx.h14435 #define XSPI_DCR4_REFRESH_Pos (0U) macro
14436 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFF…
14888 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
15299 #define HSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
Dstm32u545xx.h11987 #define XSPI_DCR4_REFRESH_Pos (0U) macro
11988 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFF…
12406 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
Dstm32u535xx.h11587 #define XSPI_DCR4_REFRESH_Pos (0U) macro
11588 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFF…
12006 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
Dstm32u599xx.h16656 #define XSPI_DCR4_REFRESH_Pos (0U) macro
16657 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFF…
17109 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
17520 #define HSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
Dstm32u5g7xx.h14884 #define XSPI_DCR4_REFRESH_Pos (0U) macro
14885 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFF…
15337 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
15748 #define HSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
Dstm32u5f9xx.h17561 #define XSPI_DCR4_REFRESH_Pos (0U) macro
17562 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFF…
18014 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
18425 #define HSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
Dstm32u5a9xx.h17105 #define XSPI_DCR4_REFRESH_Pos (0U) macro
17106 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFF…
17558 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
17969 #define HSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
Dstm32u5g9xx.h18010 #define XSPI_DCR4_REFRESH_Pos (0U) macro
18011 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFF…
18463 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
18874 #define HSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
Dstm32u575xx.h12622 #define XSPI_DCR4_REFRESH_Pos (0U) macro
12623 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFF…
13041 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
Dstm32u585xx.h13071 #define XSPI_DCR4_REFRESH_Pos (0U) macro
13072 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFF…
13490 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h10895 #define XSPI_DCR4_REFRESH_Pos (0U) macro
10896 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFFF…
11307 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
Dstm32h562xx.h11621 #define XSPI_DCR4_REFRESH_Pos (0U) macro
11622 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFFF…
12033 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
Dstm32h533xx.h11304 #define XSPI_DCR4_REFRESH_Pos (0U) macro
11305 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFFF…
11716 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
Dstm32h573xx.h14114 #define XSPI_DCR4_REFRESH_Pos (0U) macro
14115 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFFF…
14526 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
Dstm32h563xx.h13705 #define XSPI_DCR4_REFRESH_Pos (0U) macro
13706 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFFF…
14117 #define OCTOSPI_DCR4_REFRESH_Pos XSPI_DCR4_REFRESH_Pos
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h13233 #define XSPI_DCR4_REFRESH_Pos (0U) macro
13234 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFFFFFFFF */
Dstm32h7s7xx.h14267 #define XSPI_DCR4_REFRESH_Pos (0U) macro
14268 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFFFFFFFF */
Dstm32h7s3xx.h13865 #define XSPI_DCR4_REFRESH_Pos (0U) macro
13866 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFFFFFFFF */
Dstm32h7r7xx.h13633 #define XSPI_DCR4_REFRESH_Pos (0U) macro
13634 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFFFFFFFF */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h39271 #define XSPI_DCR4_REFRESH_Pos (0U) macro
39272 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFFFFFFFF */
Dstm32n657xx.h40910 #define XSPI_DCR4_REFRESH_Pos (0U) macro
40911 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFFFFFFFF */
Dstm32n655xx.h40521 #define XSPI_DCR4_REFRESH_Pos (0U) macro
40522 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFFFFFFFF */
Dstm32n647xx.h39660 #define XSPI_DCR4_REFRESH_Pos (0U) macro
39661 #define XSPI_DCR4_REFRESH_Msk (0xFFFFFFFFUL << XSPI_DCR4_REFRESH_Pos) /*!< 0xFFFFFFFF */