/hal_stm32-latest/stm32cube/stm32u5xx/soc/ |
D | stm32u595xx.h | 12909 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x00… macro 12910 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devi… 13361 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00… 13775 #define HSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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D | stm32u5a5xx.h | 13358 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x00… macro 13359 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devi… 13810 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00… 14224 #define HSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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D | stm32u5f7xx.h | 14407 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x00… macro 14408 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devi… 14859 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00… 15273 #define HSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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D | stm32u545xx.h | 11959 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x00… macro 11960 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devi… 12377 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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D | stm32u535xx.h | 11559 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x00… macro 11560 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devi… 11977 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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D | stm32u599xx.h | 16628 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x00… macro 16629 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devi… 17080 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00… 17494 #define HSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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D | stm32u5g7xx.h | 14856 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x00… macro 14857 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devi… 15308 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00… 15722 #define HSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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D | stm32u5f9xx.h | 17533 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x00… macro 17534 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devi… 17985 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00… 18399 #define HSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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D | stm32u5a9xx.h | 17077 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x00… macro 17078 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devi… 17529 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00… 17943 #define HSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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D | stm32u5g9xx.h | 17982 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x00… macro 17983 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devi… 18434 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00… 18848 #define HSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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D | stm32u575xx.h | 12594 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x00… macro 12595 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devi… 13012 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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D | stm32u585xx.h | 13043 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x00… macro 13044 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devi… 13461 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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/hal_stm32-latest/stm32cube/stm32h5xx/soc/ |
D | stm32h523xx.h | 10869 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x001… macro 10870 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devic… 11281 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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D | stm32h562xx.h | 11595 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x001… macro 11596 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devic… 12007 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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D | stm32h533xx.h | 11278 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x001… macro 11279 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devic… 11690 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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D | stm32h573xx.h | 14088 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x001… macro 14089 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devic… 14500 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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D | stm32h563xx.h | 13679 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x001… macro 13680 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Devic… 14091 #define OCTOSPI_DCR1_DEVSIZE_Msk XSPI_DCR1_DEVSIZE_Msk /*!< 0x00…
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/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/ |
D | stm32h7r3xx.h | 13204 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x001F0000 */ macro 13205 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Device Size */
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D | stm32h7s7xx.h | 14238 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x001F0000 */ macro 14239 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Device Size */
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D | stm32h7s3xx.h | 13836 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x001F0000 */ macro 13837 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Device Size */
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D | stm32h7r7xx.h | 13604 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x001F0000 */ macro 13605 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Device Size */
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/hal_stm32-latest/stm32cube/stm32n6xx/soc/ |
D | stm32n645xx.h | 39239 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x001F0000 */ macro 39240 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Device Size */
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D | stm32n657xx.h | 40878 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x001F0000 */ macro 40879 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Device Size */
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D | stm32n655xx.h | 40489 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x001F0000 */ macro 40490 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Device Size */
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D | stm32n647xx.h | 39628 #define XSPI_DCR1_DEVSIZE_Msk (0x1FUL << XSPI_DCR1_DEVSIZE_Pos) /*!< 0x001F0000 */ macro 39629 #define XSPI_DCR1_DEVSIZE XSPI_DCR1_DEVSIZE_Msk /*!< Device Size */
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