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Searched refs:XSPI_CR_TCEN_Pos (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u595xx.h12851 #define XSPI_CR_TCEN_Pos (3U) macro
12852 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00…
13304 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
13723 #define HSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
Dstm32u5a5xx.h13300 #define XSPI_CR_TCEN_Pos (3U) macro
13301 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00…
13753 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
14172 #define HSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
Dstm32u5f7xx.h14349 #define XSPI_CR_TCEN_Pos (3U) macro
14350 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00…
14802 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
15221 #define HSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
Dstm32u545xx.h11906 #define XSPI_CR_TCEN_Pos (3U) macro
11907 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00…
12320 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
Dstm32u535xx.h11506 #define XSPI_CR_TCEN_Pos (3U) macro
11507 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00…
11920 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
Dstm32u599xx.h16570 #define XSPI_CR_TCEN_Pos (3U) macro
16571 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00…
17023 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
17442 #define HSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
Dstm32u5g7xx.h14798 #define XSPI_CR_TCEN_Pos (3U) macro
14799 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00…
15251 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
15670 #define HSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
Dstm32u5f9xx.h17475 #define XSPI_CR_TCEN_Pos (3U) macro
17476 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00…
17928 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
18347 #define HSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
Dstm32u5a9xx.h17019 #define XSPI_CR_TCEN_Pos (3U) macro
17020 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00…
17472 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
17891 #define HSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
Dstm32u5g9xx.h17924 #define XSPI_CR_TCEN_Pos (3U) macro
17925 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00…
18377 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
18796 #define HSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
Dstm32u575xx.h12541 #define XSPI_CR_TCEN_Pos (3U) macro
12542 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00…
12955 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
Dstm32u585xx.h12990 #define XSPI_CR_TCEN_Pos (3U) macro
12991 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00…
13404 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h10816 #define XSPI_CR_TCEN_Pos (3U) macro
10817 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x000…
11228 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
Dstm32h562xx.h11542 #define XSPI_CR_TCEN_Pos (3U) macro
11543 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x000…
11954 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
Dstm32h533xx.h11225 #define XSPI_CR_TCEN_Pos (3U) macro
11226 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x000…
11637 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
Dstm32h573xx.h14035 #define XSPI_CR_TCEN_Pos (3U) macro
14036 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x000…
14447 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
Dstm32h563xx.h13626 #define XSPI_CR_TCEN_Pos (3U) macro
13627 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x000…
14038 #define OCTOSPI_CR_TCEN_Pos XSPI_CR_TCEN_Pos
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h13149 #define XSPI_CR_TCEN_Pos (3U) macro
13150 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32h7s7xx.h14183 #define XSPI_CR_TCEN_Pos (3U) macro
14184 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32h7s3xx.h13781 #define XSPI_CR_TCEN_Pos (3U) macro
13782 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32h7r7xx.h13549 #define XSPI_CR_TCEN_Pos (3U) macro
13550 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h39175 #define XSPI_CR_TCEN_Pos (3U) macro
39176 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32n657xx.h40814 #define XSPI_CR_TCEN_Pos (3U) macro
40815 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32n655xx.h40425 #define XSPI_CR_TCEN_Pos (3U) macro
40426 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00000008 */
Dstm32n647xx.h39564 #define XSPI_CR_TCEN_Pos (3U) macro
39565 #define XSPI_CR_TCEN_Msk (0x1UL << XSPI_CR_TCEN_Pos) /*!< 0x00000008 */