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Searched refs:XSPI_CCR_IMODE_Pos (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h10967 #define XSPI_CCR_IMODE_Pos (0U) macro
10968 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
10970 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
10971 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
10972 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
11379 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
Dstm32h562xx.h11693 #define XSPI_CCR_IMODE_Pos (0U) macro
11694 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
11696 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
11697 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
11698 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
12105 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
Dstm32h533xx.h11376 #define XSPI_CCR_IMODE_Pos (0U) macro
11377 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
11379 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
11380 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
11381 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
11788 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
Dstm32h573xx.h14186 #define XSPI_CCR_IMODE_Pos (0U) macro
14187 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
14189 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
14190 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
14191 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
14598 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
Dstm32h563xx.h13777 #define XSPI_CCR_IMODE_Pos (0U) macro
13778 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
13780 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
13781 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
13782 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x000…
14189 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h12059 #define XSPI_CCR_IMODE_Pos (0U) macro
12060 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
12062 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
12063 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
12064 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
12478 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
Dstm32u535xx.h11659 #define XSPI_CCR_IMODE_Pos (0U) macro
11660 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
11662 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
11663 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
11664 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
12078 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
Dstm32u595xx.h13009 #define XSPI_CCR_IMODE_Pos (0U) macro
13010 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
13012 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
13013 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
13014 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
13462 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
13873 #define HSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
Dstm32u5a5xx.h13458 #define XSPI_CCR_IMODE_Pos (0U) macro
13459 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
13461 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
13462 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
13463 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
13911 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
14322 #define HSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
Dstm32u5f7xx.h14507 #define XSPI_CCR_IMODE_Pos (0U) macro
14508 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
14510 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
14511 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
14512 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
14960 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
15371 #define HSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
Dstm32u575xx.h12694 #define XSPI_CCR_IMODE_Pos (0U) macro
12695 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
12697 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
12698 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
12699 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
13113 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
Dstm32u599xx.h16728 #define XSPI_CCR_IMODE_Pos (0U) macro
16729 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
16731 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
16732 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
16733 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
17181 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
17592 #define HSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
Dstm32u5g7xx.h14956 #define XSPI_CCR_IMODE_Pos (0U) macro
14957 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
14959 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
14960 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
14961 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
15409 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
15820 #define HSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
Dstm32u585xx.h13143 #define XSPI_CCR_IMODE_Pos (0U) macro
13144 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
13146 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
13147 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
13148 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
13562 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
Dstm32u5f9xx.h17633 #define XSPI_CCR_IMODE_Pos (0U) macro
17634 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
17636 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
17637 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
17638 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
18086 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
18497 #define HSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
Dstm32u5a9xx.h17177 #define XSPI_CCR_IMODE_Pos (0U) macro
17178 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
17180 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
17181 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
17182 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
17630 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
18041 #define HSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
Dstm32u5g9xx.h18082 #define XSPI_CCR_IMODE_Pos (0U) macro
18083 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
18085 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
18086 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
18087 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00…
18535 #define OCTOSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
18946 #define HSPI_CCR_IMODE_Pos XSPI_CCR_IMODE_Pos
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h13305 #define XSPI_CCR_IMODE_Pos (0U) macro
13306 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
13308 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
13309 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
13310 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h7s7xx.h14339 #define XSPI_CCR_IMODE_Pos (0U) macro
14340 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
14342 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
14343 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
14344 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h7s3xx.h13937 #define XSPI_CCR_IMODE_Pos (0U) macro
13938 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
13940 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
13941 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
13942 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32h7r7xx.h13705 #define XSPI_CCR_IMODE_Pos (0U) macro
13706 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
13708 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
13709 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
13710 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h39343 #define XSPI_CCR_IMODE_Pos (0U) macro
39344 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
39346 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
39347 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
39348 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32n657xx.h40982 #define XSPI_CCR_IMODE_Pos (0U) macro
40983 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
40985 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
40986 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
40987 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32n655xx.h40593 #define XSPI_CCR_IMODE_Pos (0U) macro
40594 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
40596 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
40597 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
40598 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000004 */
Dstm32n647xx.h39732 #define XSPI_CCR_IMODE_Pos (0U) macro
39733 #define XSPI_CCR_IMODE_Msk (0x7UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000007 */
39735 #define XSPI_CCR_IMODE_0 (0x1UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000001 */
39736 #define XSPI_CCR_IMODE_1 (0x2UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000002 */
39737 #define XSPI_CCR_IMODE_2 (0x4UL << XSPI_CCR_IMODE_Pos) /*!< 0x00000004 */