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Searched refs:XSPI_CCR_IDTR_Pos (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u595xx.h13015 #define XSPI_CCR_IDTR_Pos (3U) macro
13016 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00…
13468 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
13879 #define HSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
Dstm32u5a5xx.h13464 #define XSPI_CCR_IDTR_Pos (3U) macro
13465 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00…
13917 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
14328 #define HSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
Dstm32u5f7xx.h14513 #define XSPI_CCR_IDTR_Pos (3U) macro
14514 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00…
14966 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
15377 #define HSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
Dstm32u545xx.h12065 #define XSPI_CCR_IDTR_Pos (3U) macro
12066 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00…
12484 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
Dstm32u535xx.h11665 #define XSPI_CCR_IDTR_Pos (3U) macro
11666 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00…
12084 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
Dstm32u599xx.h16734 #define XSPI_CCR_IDTR_Pos (3U) macro
16735 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00…
17187 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
17598 #define HSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
Dstm32u5g7xx.h14962 #define XSPI_CCR_IDTR_Pos (3U) macro
14963 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00…
15415 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
15826 #define HSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
Dstm32u5f9xx.h17639 #define XSPI_CCR_IDTR_Pos (3U) macro
17640 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00…
18092 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
18503 #define HSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
Dstm32u5a9xx.h17183 #define XSPI_CCR_IDTR_Pos (3U) macro
17184 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00…
17636 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
18047 #define HSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
Dstm32u5g9xx.h18088 #define XSPI_CCR_IDTR_Pos (3U) macro
18089 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00…
18541 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
18952 #define HSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
Dstm32u575xx.h12700 #define XSPI_CCR_IDTR_Pos (3U) macro
12701 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00…
13119 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
Dstm32u585xx.h13149 #define XSPI_CCR_IDTR_Pos (3U) macro
13150 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00…
13568 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h10973 #define XSPI_CCR_IDTR_Pos (3U) macro
10974 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x000…
11385 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
Dstm32h562xx.h11699 #define XSPI_CCR_IDTR_Pos (3U) macro
11700 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x000…
12111 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
Dstm32h533xx.h11382 #define XSPI_CCR_IDTR_Pos (3U) macro
11383 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x000…
11794 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
Dstm32h573xx.h14192 #define XSPI_CCR_IDTR_Pos (3U) macro
14193 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x000…
14604 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
Dstm32h563xx.h13783 #define XSPI_CCR_IDTR_Pos (3U) macro
13784 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x000…
14195 #define OCTOSPI_CCR_IDTR_Pos XSPI_CCR_IDTR_Pos
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h13311 #define XSPI_CCR_IDTR_Pos (3U) macro
13312 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00000008 */
Dstm32h7s7xx.h14345 #define XSPI_CCR_IDTR_Pos (3U) macro
14346 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00000008 */
Dstm32h7s3xx.h13943 #define XSPI_CCR_IDTR_Pos (3U) macro
13944 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00000008 */
Dstm32h7r7xx.h13711 #define XSPI_CCR_IDTR_Pos (3U) macro
13712 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h39349 #define XSPI_CCR_IDTR_Pos (3U) macro
39350 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00000008 */
Dstm32n657xx.h40988 #define XSPI_CCR_IDTR_Pos (3U) macro
40989 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00000008 */
Dstm32n655xx.h40599 #define XSPI_CCR_IDTR_Pos (3U) macro
40600 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00000008 */
Dstm32n647xx.h39738 #define XSPI_CCR_IDTR_Pos (3U) macro
39739 #define XSPI_CCR_IDTR_Msk (0x1UL << XSPI_CCR_IDTR_Pos) /*!< 0x00000008 */