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Searched refs:XSPI_CCR_ABSIZE_Pos (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h11004 #define XSPI_CCR_ABSIZE_Pos (20U) macro
11005 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x003…
11007 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x001…
11008 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x002…
11416 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
Dstm32h562xx.h11730 #define XSPI_CCR_ABSIZE_Pos (20U) macro
11731 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x003…
11733 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x001…
11734 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x002…
12142 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
Dstm32h533xx.h11413 #define XSPI_CCR_ABSIZE_Pos (20U) macro
11414 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x003…
11416 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x001…
11417 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x002…
11825 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
Dstm32h573xx.h14223 #define XSPI_CCR_ABSIZE_Pos (20U) macro
14224 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x003…
14226 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x001…
14227 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x002…
14635 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
Dstm32h563xx.h13814 #define XSPI_CCR_ABSIZE_Pos (20U) macro
13815 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x003…
13817 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x001…
13818 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x002…
14226 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h12096 #define XSPI_CCR_ABSIZE_Pos (20U) macro
12097 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
12099 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
12100 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
12515 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
Dstm32u535xx.h11696 #define XSPI_CCR_ABSIZE_Pos (20U) macro
11697 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
11699 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
11700 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
12115 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
Dstm32u595xx.h13046 #define XSPI_CCR_ABSIZE_Pos (20U) macro
13047 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
13049 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
13050 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
13499 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
13910 #define HSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
Dstm32u5a5xx.h13495 #define XSPI_CCR_ABSIZE_Pos (20U) macro
13496 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
13498 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
13499 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
13948 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
14359 #define HSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
Dstm32u5f7xx.h14544 #define XSPI_CCR_ABSIZE_Pos (20U) macro
14545 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
14547 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
14548 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
14997 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
15408 #define HSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
Dstm32u575xx.h12731 #define XSPI_CCR_ABSIZE_Pos (20U) macro
12732 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
12734 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
12735 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
13150 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
Dstm32u599xx.h16765 #define XSPI_CCR_ABSIZE_Pos (20U) macro
16766 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
16768 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
16769 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
17218 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
17629 #define HSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
Dstm32u5g7xx.h14993 #define XSPI_CCR_ABSIZE_Pos (20U) macro
14994 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
14996 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
14997 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
15446 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
15857 #define HSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
Dstm32u5f9xx.h17670 #define XSPI_CCR_ABSIZE_Pos (20U) macro
17671 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
17673 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
17674 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
18123 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
18534 #define HSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
Dstm32u5a9xx.h17214 #define XSPI_CCR_ABSIZE_Pos (20U) macro
17215 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
17217 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
17218 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
17667 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
18078 #define HSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
Dstm32u5g9xx.h18119 #define XSPI_CCR_ABSIZE_Pos (20U) macro
18120 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
18122 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
18123 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
18572 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
18983 #define HSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
Dstm32u585xx.h13180 #define XSPI_CCR_ABSIZE_Pos (20U) macro
13181 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
13183 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
13184 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00…
13599 #define OCTOSPI_CCR_ABSIZE_Pos XSPI_CCR_ABSIZE_Pos
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h13342 #define XSPI_CCR_ABSIZE_Pos (20U) macro
13343 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00300000 */
13345 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00100000 */
13346 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00200000 */
Dstm32h7s7xx.h14376 #define XSPI_CCR_ABSIZE_Pos (20U) macro
14377 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00300000 */
14379 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00100000 */
14380 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00200000 */
Dstm32h7s3xx.h13974 #define XSPI_CCR_ABSIZE_Pos (20U) macro
13975 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00300000 */
13977 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00100000 */
13978 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00200000 */
Dstm32h7r7xx.h13742 #define XSPI_CCR_ABSIZE_Pos (20U) macro
13743 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00300000 */
13745 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00100000 */
13746 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00200000 */
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h39380 #define XSPI_CCR_ABSIZE_Pos (20U) macro
39381 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00300000 */
39383 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00100000 */
39384 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00200000 */
Dstm32n657xx.h41019 #define XSPI_CCR_ABSIZE_Pos (20U) macro
41020 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00300000 */
41022 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00100000 */
41023 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00200000 */
Dstm32n655xx.h40630 #define XSPI_CCR_ABSIZE_Pos (20U) macro
40631 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00300000 */
40633 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00100000 */
40634 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00200000 */
Dstm32n647xx.h39769 #define XSPI_CCR_ABSIZE_Pos (20U) macro
39770 #define XSPI_CCR_ABSIZE_Msk (0x3UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00300000 */
39772 #define XSPI_CCR_ABSIZE_0 (0x1UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00100000 */
39773 #define XSPI_CCR_ABSIZE_1 (0x2UL << XSPI_CCR_ABSIZE_Pos) /*!< 0x00200000 */