/hal_stm32-latest/stm32cube/stm32g0xx/soc/ |
D | stm32g031xx.h | 7466 #define VREFBUF_CSR_HIZ_Pos (1U) macro 7467 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32g041xx.h | 7770 #define VREFBUF_CSR_HIZ_Pos (1U) macro 7771 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32g051xx.h | 7947 #define VREFBUF_CSR_HIZ_Pos (1U) macro 7948 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32g061xx.h | 8251 #define VREFBUF_CSR_HIZ_Pos (1U) macro 8252 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32g071xx.h | 8331 #define VREFBUF_CSR_HIZ_Pos (1U) macro 8332 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32g081xx.h | 8635 #define VREFBUF_CSR_HIZ_Pos (1U) macro 8636 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32g0c1xx.h | 10219 #define VREFBUF_CSR_HIZ_Pos (1U) macro 10220 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32g0b1xx.h | 9915 #define VREFBUF_CSR_HIZ_Pos (1U) macro 9916 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
/hal_stm32-latest/stm32cube/stm32wlxx/soc/ |
D | stm32wle4xx.h | 8509 #define VREFBUF_CSR_HIZ_Pos (1U) macro 8510 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32wle5xx.h | 8509 #define VREFBUF_CSR_HIZ_Pos (1U) macro 8510 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32wl5mxx.h | 10136 #define VREFBUF_CSR_HIZ_Pos (1U) macro 10137 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32wl54xx.h | 10136 #define VREFBUF_CSR_HIZ_Pos (1U) macro 10137 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32wl55xx.h | 10136 #define VREFBUF_CSR_HIZ_Pos (1U) macro 10137 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
/hal_stm32-latest/stm32cube/stm32u0xx/soc/ |
D | stm32u083xx.h | 10305 #define VREFBUF_CSR_HIZ_Pos (1U) macro 10306 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32u073xx.h | 10035 #define VREFBUF_CSR_HIZ_Pos (1U) macro 10036 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
/hal_stm32-latest/stm32cube/stm32wbxx/soc/ |
D | stm32wb35xx.h | 11991 #define VREFBUF_CSR_HIZ_Pos (1U) macro 11992 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32wb55xx.h | 12896 #define VREFBUF_CSR_HIZ_Pos (1U) macro 12897 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32wb5mxx.h | 12896 #define VREFBUF_CSR_HIZ_Pos (1U) macro 12897 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
/hal_stm32-latest/stm32cube/stm32g4xx/soc/ |
D | stm32g441xx.h | 11714 #define VREFBUF_CSR_HIZ_Pos (1U) macro 11715 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32g431xx.h | 11484 #define VREFBUF_CSR_HIZ_Pos (1U) macro 11485 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32g4a1xx.h | 12224 #define VREFBUF_CSR_HIZ_Pos (1U) macro 12225 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32g491xx.h | 11994 #define VREFBUF_CSR_HIZ_Pos (1U) macro 11995 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32g473xx.h | 12785 #define VREFBUF_CSR_HIZ_Pos (1U) macro 12786 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
D | stm32g471xx.h | 12217 #define VREFBUF_CSR_HIZ_Pos (1U) macro 12218 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|
/hal_stm32-latest/stm32cube/stm32l4xx/soc/ |
D | stm32l433xx.h | 14734 #define VREFBUF_CSR_HIZ_Pos (1U) macro 14735 #define VREFBUF_CSR_HIZ_Msk (0x1UL << VREFBUF_CSR_HIZ_Pos) /*!< 0x00000002 */
|