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Searched refs:UCPD_CFG1_TRANSWIN_Pos (Results 1 – 25 of 53) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_ll_ucpd.c131 UCPD_InitStruct->psc_ucpdclk | (UCPD_InitStruct->transwin << UCPD_CFG1_TRANSWIN_Pos) | in LL_UCPD_Init()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_ll_ucpd.c131 UCPD_InitStruct->psc_ucpdclk | (UCPD_InitStruct->transwin << UCPD_CFG1_TRANSWIN_Pos) | in LL_UCPD_Init()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_ll_ucpd.c131 UCPD_InitStruct->psc_ucpdclk | (UCPD_InitStruct->transwin << UCPD_CFG1_TRANSWIN_Pos) | in LL_UCPD_Init()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_ll_ucpd.c131 UCPD_InitStruct->psc_ucpdclk | (UCPD_InitStruct->transwin << UCPD_CFG1_TRANSWIN_Pos) | in LL_UCPD_Init()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_ll_ucpd.c131 UCPD_InitStruct->psc_ucpdclk | (UCPD_InitStruct->transwin << UCPD_CFG1_TRANSWIN_Pos) | in LL_UCPD_Init()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_ll_ucpd.c131 UCPD_InitStruct->psc_ucpdclk | (UCPD_InitStruct->transwin << UCPD_CFG1_TRANSWIN_Pos) | in LL_UCPD_Init()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_ll_ucpd.c148 UCPD_InitStruct->psc_ucpdclk | (UCPD_InitStruct->transwin << UCPD_CFG1_TRANSWIN_Pos) | in LL_UCPD_Init()
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g071xx.h8489 #define UCPD_CFG1_TRANSWIN_Pos (11U) macro
8490 #define UCPD_CFG1_TRANSWIN_Msk (0x1FUL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x0000F800 */
8492 #define UCPD_CFG1_TRANSWIN_0 (0x01UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00000800 */
8493 #define UCPD_CFG1_TRANSWIN_1 (0x02UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00001000 */
8494 #define UCPD_CFG1_TRANSWIN_2 (0x04UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00002000 */
8495 #define UCPD_CFG1_TRANSWIN_3 (0x08UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00004000 */
8496 #define UCPD_CFG1_TRANSWIN_4 (0x10UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00008000 */
Dstm32g081xx.h8793 #define UCPD_CFG1_TRANSWIN_Pos (11U) macro
8794 #define UCPD_CFG1_TRANSWIN_Msk (0x1FUL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x0000F800 */
8796 #define UCPD_CFG1_TRANSWIN_0 (0x01UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00000800 */
8797 #define UCPD_CFG1_TRANSWIN_1 (0x02UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00001000 */
8798 #define UCPD_CFG1_TRANSWIN_2 (0x04UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00002000 */
8799 #define UCPD_CFG1_TRANSWIN_3 (0x08UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00004000 */
8800 #define UCPD_CFG1_TRANSWIN_4 (0x10UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00008000 */
Dstm32g0c1xx.h10383 #define UCPD_CFG1_TRANSWIN_Pos (11U) macro
10384 #define UCPD_CFG1_TRANSWIN_Msk (0x1FUL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x0000F800 */
10386 #define UCPD_CFG1_TRANSWIN_0 (0x01UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00000800 */
10387 #define UCPD_CFG1_TRANSWIN_1 (0x02UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00001000 */
10388 #define UCPD_CFG1_TRANSWIN_2 (0x04UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00002000 */
10389 #define UCPD_CFG1_TRANSWIN_3 (0x08UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00004000 */
10390 #define UCPD_CFG1_TRANSWIN_4 (0x10UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00008000 */
Dstm32g0b1xx.h10079 #define UCPD_CFG1_TRANSWIN_Pos (11U) macro
10080 #define UCPD_CFG1_TRANSWIN_Msk (0x1FUL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x0000F800 */
10082 #define UCPD_CFG1_TRANSWIN_0 (0x01UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00000800 */
10083 #define UCPD_CFG1_TRANSWIN_1 (0x02UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00001000 */
10084 #define UCPD_CFG1_TRANSWIN_2 (0x04UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00002000 */
10085 #define UCPD_CFG1_TRANSWIN_3 (0x08UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00004000 */
10086 #define UCPD_CFG1_TRANSWIN_4 (0x10UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00008000 */
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_ucpd.h419 MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_TRANSWIN, TransWin << UCPD_CFG1_TRANSWIN_Pos); in LL_UCPD_SetTransWin()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_ucpd.h421 MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_TRANSWIN, TransWin << UCPD_CFG1_TRANSWIN_Pos); in LL_UCPD_SetTransWin()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_ucpd.h421 MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_TRANSWIN, TransWin << UCPD_CFG1_TRANSWIN_Pos); in LL_UCPD_SetTransWin()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_ucpd.h421 MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_TRANSWIN, TransWin << UCPD_CFG1_TRANSWIN_Pos); in LL_UCPD_SetTransWin()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_ucpd.h421 MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_TRANSWIN, TransWin << UCPD_CFG1_TRANSWIN_Pos); in LL_UCPD_SetTransWin()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_ucpd.h421 MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_TRANSWIN, TransWin << UCPD_CFG1_TRANSWIN_Pos); in LL_UCPD_SetTransWin()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_ucpd.h421 MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_TRANSWIN, TransWin << UCPD_CFG1_TRANSWIN_Pos); in LL_UCPD_SetTransWin()
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g441xx.h12415 #define UCPD_CFG1_TRANSWIN_Pos (11U) macro
12416 #define UCPD_CFG1_TRANSWIN_Msk (0x1FUL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x0000F800 */
12418 #define UCPD_CFG1_TRANSWIN_0 (0x01UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00000800 */
12419 #define UCPD_CFG1_TRANSWIN_1 (0x02UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00001000 */
12420 #define UCPD_CFG1_TRANSWIN_2 (0x04UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00002000 */
12421 #define UCPD_CFG1_TRANSWIN_3 (0x08UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00004000 */
12422 #define UCPD_CFG1_TRANSWIN_4 (0x10UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00008000 */
Dstm32gbk1cb.h12132 #define UCPD_CFG1_TRANSWIN_Pos (11U) macro
12133 #define UCPD_CFG1_TRANSWIN_Msk (0x1FUL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x0000F800 */
12135 #define UCPD_CFG1_TRANSWIN_0 (0x01UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00000800 */
12136 #define UCPD_CFG1_TRANSWIN_1 (0x02UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00001000 */
12137 #define UCPD_CFG1_TRANSWIN_2 (0x04UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00002000 */
12138 #define UCPD_CFG1_TRANSWIN_3 (0x08UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00004000 */
12139 #define UCPD_CFG1_TRANSWIN_4 (0x10UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00008000 */
Dstm32g431xx.h12185 #define UCPD_CFG1_TRANSWIN_Pos (11U) macro
12186 #define UCPD_CFG1_TRANSWIN_Msk (0x1FUL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x0000F800 */
12188 #define UCPD_CFG1_TRANSWIN_0 (0x01UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00000800 */
12189 #define UCPD_CFG1_TRANSWIN_1 (0x02UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00001000 */
12190 #define UCPD_CFG1_TRANSWIN_2 (0x04UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00002000 */
12191 #define UCPD_CFG1_TRANSWIN_3 (0x08UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00004000 */
12192 #define UCPD_CFG1_TRANSWIN_4 (0x10UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00008000 */
Dstm32g4a1xx.h12925 #define UCPD_CFG1_TRANSWIN_Pos (11U) macro
12926 #define UCPD_CFG1_TRANSWIN_Msk (0x1FUL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x0000F800 */
12928 #define UCPD_CFG1_TRANSWIN_0 (0x01UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00000800 */
12929 #define UCPD_CFG1_TRANSWIN_1 (0x02UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00001000 */
12930 #define UCPD_CFG1_TRANSWIN_2 (0x04UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00002000 */
12931 #define UCPD_CFG1_TRANSWIN_3 (0x08UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00004000 */
12932 #define UCPD_CFG1_TRANSWIN_4 (0x10UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00008000 */
Dstm32g491xx.h12695 #define UCPD_CFG1_TRANSWIN_Pos (11U) macro
12696 #define UCPD_CFG1_TRANSWIN_Msk (0x1FUL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x0000F800 */
12698 #define UCPD_CFG1_TRANSWIN_0 (0x01UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00000800 */
12699 #define UCPD_CFG1_TRANSWIN_1 (0x02UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00001000 */
12700 #define UCPD_CFG1_TRANSWIN_2 (0x04UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00002000 */
12701 #define UCPD_CFG1_TRANSWIN_3 (0x08UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00004000 */
12702 #define UCPD_CFG1_TRANSWIN_4 (0x10UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00008000 */
Dstm32g473xx.h13486 #define UCPD_CFG1_TRANSWIN_Pos (11U) macro
13487 #define UCPD_CFG1_TRANSWIN_Msk (0x1FUL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x0000F800 */
13489 #define UCPD_CFG1_TRANSWIN_0 (0x01UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00000800 */
13490 #define UCPD_CFG1_TRANSWIN_1 (0x02UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00001000 */
13491 #define UCPD_CFG1_TRANSWIN_2 (0x04UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00002000 */
13492 #define UCPD_CFG1_TRANSWIN_3 (0x08UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00004000 */
13493 #define UCPD_CFG1_TRANSWIN_4 (0x10UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00008000 */
Dstm32g471xx.h12918 #define UCPD_CFG1_TRANSWIN_Pos (11U) macro
12919 #define UCPD_CFG1_TRANSWIN_Msk (0x1FUL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x0000F800 */
12921 #define UCPD_CFG1_TRANSWIN_0 (0x01UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00000800 */
12922 #define UCPD_CFG1_TRANSWIN_1 (0x02UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00001000 */
12923 #define UCPD_CFG1_TRANSWIN_2 (0x04UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00002000 */
12924 #define UCPD_CFG1_TRANSWIN_3 (0x08UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00004000 */
12925 #define UCPD_CFG1_TRANSWIN_4 (0x10UL << UCPD_CFG1_TRANSWIN_Pos) /*!< 0x00008000 */

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