| /hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/ |
| D | stm32h7rsxx_ll_ucpd.c | 130 UCPD_CFG1_PSC_UCPDCLK | UCPD_CFG1_TRANSWIN | UCPD_CFG1_IFRGAP | UCPD_CFG1_HBITCLKDIV, in LL_UCPD_Init()
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| /hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/ |
| D | stm32u5xx_ll_ucpd.c | 130 UCPD_CFG1_PSC_UCPDCLK | UCPD_CFG1_TRANSWIN | UCPD_CFG1_IFRGAP | UCPD_CFG1_HBITCLKDIV, in LL_UCPD_Init()
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| /hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/ |
| D | stm32l5xx_ll_ucpd.c | 130 UCPD_CFG1_PSC_UCPDCLK | UCPD_CFG1_TRANSWIN | UCPD_CFG1_IFRGAP | UCPD_CFG1_HBITCLKDIV, in LL_UCPD_Init()
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| /hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/ |
| D | stm32n6xx_ll_ucpd.c | 130 UCPD_CFG1_PSC_UCPDCLK | UCPD_CFG1_TRANSWIN | UCPD_CFG1_IFRGAP | UCPD_CFG1_HBITCLKDIV, in LL_UCPD_Init()
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| /hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/ |
| D | stm32g4xx_ll_ucpd.c | 130 UCPD_CFG1_PSC_UCPDCLK | UCPD_CFG1_TRANSWIN | UCPD_CFG1_IFRGAP | UCPD_CFG1_HBITCLKDIV, in LL_UCPD_Init()
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| /hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/ |
| D | stm32h5xx_ll_ucpd.c | 130 UCPD_CFG1_PSC_UCPDCLK | UCPD_CFG1_TRANSWIN | UCPD_CFG1_IFRGAP | UCPD_CFG1_HBITCLKDIV, in LL_UCPD_Init()
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| /hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/ |
| D | stm32g0xx_ll_ucpd.c | 147 UCPD_CFG1_PSC_UCPDCLK | UCPD_CFG1_TRANSWIN | UCPD_CFG1_IFRGAP | UCPD_CFG1_HBITCLKDIV, in LL_UCPD_Init()
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| /hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/ |
| D | stm32n6xx_ll_ucpd.h | 431 MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_IFRGAP, IfrGap << UCPD_CFG1_IFRGAP_Pos); in LL_UCPD_SetIfrGap()
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/ |
| D | stm32h7rsxx_ll_ucpd.h | 433 MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_IFRGAP, IfrGap << UCPD_CFG1_IFRGAP_Pos); in LL_UCPD_SetIfrGap()
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| /hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
| D | stm32h5xx_ll_ucpd.h | 433 MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_IFRGAP, IfrGap << UCPD_CFG1_IFRGAP_Pos); in LL_UCPD_SetIfrGap()
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| /hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
| D | stm32u5xx_ll_ucpd.h | 433 MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_IFRGAP, IfrGap << UCPD_CFG1_IFRGAP_Pos); in LL_UCPD_SetIfrGap()
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| /hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/ |
| D | stm32g0xx_ll_ucpd.h | 433 MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_IFRGAP, IfrGap << UCPD_CFG1_IFRGAP_Pos); in LL_UCPD_SetIfrGap()
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| /hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/ |
| D | stm32l5xx_ll_ucpd.h | 433 MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_IFRGAP, IfrGap << UCPD_CFG1_IFRGAP_Pos); in LL_UCPD_SetIfrGap()
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| /hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/ |
| D | stm32g4xx_ll_ucpd.h | 433 MODIFY_REG(UCPDx->CFG1, UCPD_CFG1_IFRGAP, IfrGap << UCPD_CFG1_IFRGAP_Pos); in LL_UCPD_SetIfrGap()
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| /hal_stm32-latest/stm32cube/stm32g0xx/soc/ |
| D | stm32g071xx.h | 8483 #define UCPD_CFG1_IFRGAP UCPD_CFG1_IFRGAP_Msk /*!< Clock divide… macro
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| D | stm32g081xx.h | 8787 #define UCPD_CFG1_IFRGAP UCPD_CFG1_IFRGAP_Msk /*!< Clock divide… macro
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| D | stm32g0c1xx.h | 10377 #define UCPD_CFG1_IFRGAP UCPD_CFG1_IFRGAP_Msk /*!< Clock divide… macro
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| D | stm32g0b1xx.h | 10073 #define UCPD_CFG1_IFRGAP UCPD_CFG1_IFRGAP_Msk /*!< Clock divide… macro
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| /hal_stm32-latest/stm32cube/stm32g4xx/soc/ |
| D | stm32g441xx.h | 12409 #define UCPD_CFG1_IFRGAP UCPD_CFG1_IFRGAP_Msk /*!< Clock divider… macro
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| D | stm32gbk1cb.h | 12126 #define UCPD_CFG1_IFRGAP UCPD_CFG1_IFRGAP_Msk /*!< Clock divider… macro
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| D | stm32g431xx.h | 12179 #define UCPD_CFG1_IFRGAP UCPD_CFG1_IFRGAP_Msk /*!< Clock divider… macro
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| D | stm32g4a1xx.h | 12919 #define UCPD_CFG1_IFRGAP UCPD_CFG1_IFRGAP_Msk /*!< Clock divider… macro
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| D | stm32g491xx.h | 12689 #define UCPD_CFG1_IFRGAP UCPD_CFG1_IFRGAP_Msk /*!< Clock divider… macro
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| D | stm32g473xx.h | 13480 #define UCPD_CFG1_IFRGAP UCPD_CFG1_IFRGAP_Msk /*!< Clock divider… macro
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| D | stm32g471xx.h | 12912 #define UCPD_CFG1_IFRGAP UCPD_CFG1_IFRGAP_Msk /*!< Clock divider… macro
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