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Searched refs:TIM1_OR2_ETRSEL_0 (Results 1 – 25 of 31) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_tim_ex.h96 #define TIM_TIM1_ETR_COMP1 TIM1_OR2_ETRSEL_0 /*!< TIM1…
Dstm32l5xx_ll_tim.h997 #define LL_TIM_ETRSOURCE_COMP1 TIM1_OR2_ETRSEL_0 /*!< ETR inp…
999 #define LL_TIM_ETRSOURCE_ADC1_AWD1 (TIM1_OR2_ETRSEL_1 | TIM1_OR2_ETRSEL_0) /*!< ETR inp…
1001 #define LL_TIM_ETRSOURCE_ADC1_AWD3 (TIM1_OR2_ETRSEL_2 | TIM1_OR2_ETRSEL_0) /*!< ETR inp…
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_tim_ex.h102 #define TIM_TIM1_ETR_COMP1 TIM1_OR2_ETRSEL_0 /*!< TIM1…
Dstm32l4xx_ll_tim.h985 #define LL_TIM_ETRSOURCE_COMP1 TIM1_OR2_ETRSEL_0 /*…
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h8750 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l412xx.h8525 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l433xx.h13231 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l451xx.h13339 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l442xx.h12397 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l431xx.h13002 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l432xx.h12172 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l443xx.h13456 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l471xx.h14357 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l452xx.h13417 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l462xx.h13642 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l475xx.h14521 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l476xx.h14678 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l486xx.h14897 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l485xx.h14746 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l4a6xx.h16228 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l496xx.h15888 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l4r5xx.h16362 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l4r7xx.h16861 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
Dstm32l4s5xx.h16709 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h14876 #define TIM1_OR2_ETRSEL_0 (0x1UL << TIM1_OR2_ETRSEL_Pos) /*!< 0x00004000 */ macro

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