Searched refs:TIM1_OR2_BKCMP2E_Pos (Results 1 – 25 of 29) sorted by relevance
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2143 bkin_enable_bitpos = TIM1_OR2_BKCMP2E_Pos; in HAL_TIMEx_ConfigBreakInput()
2153 bkin_enable_bitpos = TIM1_OR2_BKCMP2E_Pos; in HAL_TIMEx_ConfigBreakInput()
8734 #define TIM1_OR2_BKCMP2E_Pos (2U) macro8735 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
8509 #define TIM1_OR2_BKCMP2E_Pos (2U) macro8510 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
13215 #define TIM1_OR2_BKCMP2E_Pos (2U) macro13216 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
13320 #define TIM1_OR2_BKCMP2E_Pos (2U) macro13321 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
12381 #define TIM1_OR2_BKCMP2E_Pos (2U) macro12382 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
12986 #define TIM1_OR2_BKCMP2E_Pos (2U) macro12987 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
12156 #define TIM1_OR2_BKCMP2E_Pos (2U) macro12157 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
13440 #define TIM1_OR2_BKCMP2E_Pos (2U) macro13441 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
14338 #define TIM1_OR2_BKCMP2E_Pos (2U) macro14339 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
13398 #define TIM1_OR2_BKCMP2E_Pos (2U) macro13399 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
13623 #define TIM1_OR2_BKCMP2E_Pos (2U) macro13624 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
14502 #define TIM1_OR2_BKCMP2E_Pos (2U) macro14503 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
14659 #define TIM1_OR2_BKCMP2E_Pos (2U) macro14660 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
14878 #define TIM1_OR2_BKCMP2E_Pos (2U) macro14879 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
14727 #define TIM1_OR2_BKCMP2E_Pos (2U) macro14728 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
16209 #define TIM1_OR2_BKCMP2E_Pos (2U) macro16210 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
15869 #define TIM1_OR2_BKCMP2E_Pos (2U) macro15870 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
16343 #define TIM1_OR2_BKCMP2E_Pos (2U) macro16344 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
16842 #define TIM1_OR2_BKCMP2E_Pos (2U) macro16843 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
16690 #define TIM1_OR2_BKCMP2E_Pos (2U) macro16691 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
17189 #define TIM1_OR2_BKCMP2E_Pos (2U) macro17190 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
14857 #define TIM1_OR2_BKCMP2E_Pos (2U) macro14858 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
15596 #define TIM1_OR2_BKCMP2E_Pos (2U) macro15597 #define TIM1_OR2_BKCMP2E_Msk (0x1UL << TIM1_OR2_BKCMP2E_Pos) /*!< 0x00000004 */
