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Searched refs:TIM1_OR2_BKCMP1P_Pos (Results 1 – 25 of 29) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_tim_ex.c2137 bkin_polarity_bitpos = TIM1_OR2_BKCMP1P_Pos; in HAL_TIMEx_ConfigBreakInput()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_tim_ex.c2147 bkin_polarity_bitpos = TIM1_OR2_BKCMP1P_Pos; in HAL_TIMEx_ConfigBreakInput()
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h8740 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
8741 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l412xx.h8515 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
8516 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l433xx.h13221 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
13222 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l451xx.h13329 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
13330 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l442xx.h12387 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
12388 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l431xx.h12992 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
12993 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l432xx.h12162 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
12163 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l443xx.h13446 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
13447 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l471xx.h14347 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
14348 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l452xx.h13407 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
13408 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l462xx.h13632 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
13633 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l475xx.h14511 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
14512 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l476xx.h14668 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
14669 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l486xx.h14887 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
14888 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l485xx.h14736 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
14737 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l4a6xx.h16218 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
16219 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l496xx.h15878 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
15879 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l4r5xx.h16352 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
16353 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l4r7xx.h16851 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
16852 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l4s5xx.h16699 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
16700 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l4s7xx.h17198 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
17199 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h14866 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
14867 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */
Dstm32l562xx.h15605 #define TIM1_OR2_BKCMP1P_Pos (10U) macro
15606 #define TIM1_OR2_BKCMP1P_Msk (0x1UL << TIM1_OR2_BKCMP1P_Pos) /*!< 0x00000400 */

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