Searched refs:TIM16_OR1_TI1_RMP_2 (Results 1 – 13 of 13) sorted by relevance
175 #if defined (TIM16_OR1_TI1_RMP_2)176 #define TIM_TIM16_TI1_MSI TIM16_OR1_TI1_RMP_2 /*!< TIM1…177 #define TIM_TIM16_TI1_HSE_32 (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_0) /*!< TIM1…178 #define TIM_TIM16_TI1_MCO (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_1) /*!< TIM1…
1300 #if defined TIM16_OR1_TI1_RMP_21301 #define LL_TIM_TIM16_TI1_RMP_MSI (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_RMP_MASK) …1302 #define LL_TIM_TIM16_TI1_RMP_HSE_32 (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_0 | TIM16_OR1_RMP_MAS…1303 #define LL_TIM_TIM16_TI1_RMP_MCO (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_1 | TIM16_OR1_RMP_MAS…
8829 #define TIM16_OR1_TI1_RMP_2 (0x4UL << TIM16_OR1_TI1_RMP_Pos) /*!< 0x00000004 */ macro
8604 #define TIM16_OR1_TI1_RMP_2 (0x4UL << TIM16_OR1_TI1_RMP_Pos) /*!< 0x00000004 */ macro
13316 #define TIM16_OR1_TI1_RMP_2 (0x4UL << TIM16_OR1_TI1_RMP_Pos) /*!< 0x00000004 */ macro
12482 #define TIM16_OR1_TI1_RMP_2 (0x4UL << TIM16_OR1_TI1_RMP_Pos) /*!< 0x00000004 */ macro
13087 #define TIM16_OR1_TI1_RMP_2 (0x4UL << TIM16_OR1_TI1_RMP_Pos) /*!< 0x00000004 */ macro
12257 #define TIM16_OR1_TI1_RMP_2 (0x4UL << TIM16_OR1_TI1_RMP_Pos) /*!< 0x00000004 */ macro
13541 #define TIM16_OR1_TI1_RMP_2 (0x4UL << TIM16_OR1_TI1_RMP_Pos) /*!< 0x00000004 */ macro
16402 #define TIM16_OR1_TI1_RMP_2 (0x4UL << TIM16_OR1_TI1_RMP_Pos) /*!< 0x00000004 */ macro
16062 #define TIM16_OR1_TI1_RMP_2 (0x4UL << TIM16_OR1_TI1_RMP_Pos) /*!< 0x00000004 */ macro
17531 #define TIM16_OR1_TI1_RMP_2 (0x4UL << TIM16_OR1_TI1_RMP_Pos) /*!< 0x00000004 */ macro
18042 #define TIM16_OR1_TI1_RMP_2 (0x4UL << TIM16_OR1_TI1_RMP_Pos) /*!< 0x00000004 */ macro
