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Searched refs:TCR (Results 1 – 25 of 58) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_gfxtim.c809 SET_BIT(hgfxtim->Instance->TCR, (GFXTIM_TCR_AFCEN | GFXTIM_TCR_ALCEN)); in HAL_GFXTIM_AbsoluteTimer_Start()
875 SET_BIT(hgfxtim->Instance->TCR, (GFXTIM_TCR_FAFCR | GFXTIM_TCR_FALCR)); in HAL_GFXTIM_AbsoluteTimer_Reset()
1140 MODIFY_REG(hgfxtim->Instance->TCR, GFXTIM_TCR_RFC1CM, in HAL_GFXTIM_RelativeTimer_Config()
1154 MODIFY_REG(hgfxtim->Instance->TCR, GFXTIM_TCR_RFC2CM, in HAL_GFXTIM_RelativeTimer_Config()
1197 SET_BIT(hgfxtim->Instance->TCR, GFXTIM_TCR_RFC1EN); in HAL_GFXTIM_RelativeTimer_Start()
1202 SET_BIT(hgfxtim->Instance->TCR, GFXTIM_TCR_RFC2EN); in HAL_GFXTIM_RelativeTimer_Start()
1284 SET_BIT(hgfxtim->Instance->TCR, GFXTIM_TCR_FRFC1R); in HAL_GFXTIM_RelativeTimer_ForceReload()
1289 SET_BIT(hgfxtim->Instance->TCR, GFXTIM_TCR_FRFC2R); in HAL_GFXTIM_RelativeTimer_ForceReload()
Dstm32h7rsxx_hal_xspi.c446 MODIFY_REG(hxspi->Instance->TCR, (XSPI_TCR_SSHIFT | XSPI_TCR_DHQC), in HAL_XSPI_Init()
3203 tcr_reg = &(hxspi->Instance->TCR); in XSPI_ConfigCmd()
3239 CLEAR_BIT(hxspi->Instance->TCR, XSPI_TCR_SSHIFT); in XSPI_ConfigCmd()
3244 SET_BIT(hxspi->Instance->TCR, XSPI_TCR_SSHIFT); in XSPI_ConfigCmd()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_gfxtim.c809 SET_BIT(hgfxtim->Instance->TCR, (GFXTIM_TCR_AFCEN | GFXTIM_TCR_ALCEN)); in HAL_GFXTIM_AbsoluteTimer_Start()
875 SET_BIT(hgfxtim->Instance->TCR, (GFXTIM_TCR_FAFCR | GFXTIM_TCR_FALCR)); in HAL_GFXTIM_AbsoluteTimer_Reset()
1140 MODIFY_REG(hgfxtim->Instance->TCR, GFXTIM_TCR_RFC1CM, in HAL_GFXTIM_RelativeTimer_Config()
1154 MODIFY_REG(hgfxtim->Instance->TCR, GFXTIM_TCR_RFC2CM, in HAL_GFXTIM_RelativeTimer_Config()
1197 SET_BIT(hgfxtim->Instance->TCR, GFXTIM_TCR_RFC1EN); in HAL_GFXTIM_RelativeTimer_Start()
1202 SET_BIT(hgfxtim->Instance->TCR, GFXTIM_TCR_RFC2EN); in HAL_GFXTIM_RelativeTimer_Start()
1284 SET_BIT(hgfxtim->Instance->TCR, GFXTIM_TCR_FRFC1R); in HAL_GFXTIM_RelativeTimer_ForceReload()
1289 SET_BIT(hgfxtim->Instance->TCR, GFXTIM_TCR_FRFC2R); in HAL_GFXTIM_RelativeTimer_ForceReload()
Dstm32n6xx_hal_xspi.c448 MODIFY_REG(hxspi->Instance->TCR, (XSPI_TCR_SSHIFT | XSPI_TCR_DHQC), in HAL_XSPI_Init()
3256 tcr_reg = &(hxspi->Instance->TCR); in XSPI_ConfigCmd()
3292 CLEAR_BIT(hxspi->Instance->TCR, XSPI_TCR_SSHIFT); in XSPI_ConfigCmd()
3297 SET_BIT(hxspi->Instance->TCR, XSPI_TCR_SSHIFT); in XSPI_ConfigCmd()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_gfxtim.c809 SET_BIT(hgfxtim->Instance->TCR, (GFXTIM_TCR_AFCEN | GFXTIM_TCR_ALCEN)); in HAL_GFXTIM_AbsoluteTimer_Start()
875 SET_BIT(hgfxtim->Instance->TCR, (GFXTIM_TCR_FAFCR | GFXTIM_TCR_FALCR)); in HAL_GFXTIM_AbsoluteTimer_Reset()
1140 MODIFY_REG(hgfxtim->Instance->TCR, GFXTIM_TCR_RFC1CM, in HAL_GFXTIM_RelativeTimer_Config()
1154 MODIFY_REG(hgfxtim->Instance->TCR, GFXTIM_TCR_RFC2CM, in HAL_GFXTIM_RelativeTimer_Config()
1197 SET_BIT(hgfxtim->Instance->TCR, GFXTIM_TCR_RFC1EN); in HAL_GFXTIM_RelativeTimer_Start()
1202 SET_BIT(hgfxtim->Instance->TCR, GFXTIM_TCR_RFC2EN); in HAL_GFXTIM_RelativeTimer_Start()
1284 SET_BIT(hgfxtim->Instance->TCR, GFXTIM_TCR_FRFC1R); in HAL_GFXTIM_RelativeTimer_ForceReload()
1289 SET_BIT(hgfxtim->Instance->TCR, GFXTIM_TCR_FRFC2R); in HAL_GFXTIM_RelativeTimer_ForceReload()
Dstm32u5xx_hal_xspi.c486 MODIFY_REG(hxspi->Instance->TCR, (XSPI_TCR_SSHIFT | XSPI_TCR_DHQC), in HAL_XSPI_Init()
3653 tcr_reg = &(hxspi->Instance->TCR); in XSPI_ConfigCmd()
3697 CLEAR_BIT(hxspi->Instance->TCR, XSPI_TCR_SSHIFT); in XSPI_ConfigCmd()
3702 SET_BIT(hxspi->Instance->TCR, XSPI_TCR_SSHIFT); in XSPI_ConfigCmd()
Dstm32u5xx_hal_ospi.c419 MODIFY_REG(hospi->Instance->TCR, (OCTOSPI_TCR_SSHIFT | OCTOSPI_TCR_DHQC), in HAL_OSPI_Init()
3076 tcr_reg = &(hospi->Instance->TCR); in OSPI_ConfigCmd()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_xspi.c424 MODIFY_REG(hxspi->Instance->TCR, (XSPI_TCR_SSHIFT | XSPI_TCR_DHQC), in HAL_XSPI_Init()
3042 tcr_reg = &(hxspi->Instance->TCR); in XSPI_ConfigCmd()
3086 CLEAR_BIT(hxspi->Instance->TCR, XSPI_TCR_SSHIFT); in XSPI_ConfigCmd()
3091 SET_BIT(hxspi->Instance->TCR, XSPI_TCR_SSHIFT); in XSPI_ConfigCmd()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_ospi.c405 MODIFY_REG(hospi->Instance->TCR, (OCTOSPI_TCR_SSHIFT | OCTOSPI_TCR_DHQC), in HAL_OSPI_Init()
2663 tcr_reg = &(hospi->Instance->TCR); in OSPI_ConfigCmd()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_ospi.c448 MODIFY_REG(hospi->Instance->TCR, (OCTOSPI_TCR_SSHIFT | OCTOSPI_TCR_DHQC), in HAL_OSPI_Init()
2948 tcr_reg = &(hospi->Instance->TCR); in OSPI_ConfigCmd()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_ospi.c422 MODIFY_REG(hospi->Instance->TCR, (OCTOSPI_TCR_SSHIFT | OCTOSPI_TCR_DHQC), in HAL_OSPI_Init()
2953 tcr_reg = &(hospi->Instance->TCR); in OSPI_ConfigCmd()
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h361 …__IO uint32_t TCR; /*!< GFXTIM timers configuration register, Address offset… member
1291 …__IO uint32_t TCR; /*!< XSPI Timing Configuration Register, Address o… member
Dstm32h7s7xx.h373 …__IO uint32_t TCR; /*!< GFXTIM timers configuration register, Address offset… member
1453 …__IO uint32_t TCR; /*!< XSPI Timing Configuration Register, Address o… member
Dstm32h7s3xx.h366 …__IO uint32_t TCR; /*!< GFXTIM timers configuration register, Address offset… member
1384 …__IO uint32_t TCR; /*!< XSPI Timing Configuration Register, Address o… member
Dstm32h7r7xx.h366 …__IO uint32_t TCR; /*!< GFXTIM timers configuration register, Address offset… member
1358 …__IO uint32_t TCR; /*!< XSPI Timing Configuration Register, Address o… member
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u5f7xx.h690 …__IO uint32_t TCR; /*!< GFXTIM timers configuration register, Address offset… member
1021 …__IO uint32_t TCR; /*!< XSPI Timing Configuration register, Address offset: … member
Dstm32u5g7xx.h730 …__IO uint32_t TCR; /*!< GFXTIM timers configuration register, Address offset… member
1061 …__IO uint32_t TCR; /*!< XSPI Timing Configuration register, Address offset: … member
Dstm32u5f9xx.h794 …__IO uint32_t TCR; /*!< GFXTIM timers configuration register, Address offset… member
1125 …__IO uint32_t TCR; /*!< XSPI Timing Configuration register, Address offset: … member
Dstm32u5g9xx.h834 …__IO uint32_t TCR; /*!< GFXTIM timers configuration register, Address offset… member
1165 …__IO uint32_t TCR; /*!< XSPI Timing Configuration register, Address offset: … member
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h802 …__IO uint32_t TCR; /*!< OCTOSPI Timing Configuration register, Address offset… member
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h788 …__IO uint32_t TCR; /*!< OCTOSPI Timing Configuration register, Address offse… member
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l4r5xx.h760 …__IO uint32_t TCR; /*!< OCTOSPI Timing Configuration register, Address offset… member
Dstm32l4r7xx.h832 …__IO uint32_t TCR; /*!< OCTOSPI Timing Configuration register, Address offset… member
Dstm32l4s5xx.h761 …__IO uint32_t TCR; /*!< OCTOSPI Timing Configuration register, Address offset… member
Dstm32l4s7xx.h833 …__IO uint32_t TCR; /*!< OCTOSPI Timing Configuration register, Address offset… member

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