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Searched refs:SDIO_DCTRL_RWSTOP_Pos (Results 1 – 25 of 29) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f401xc.h5408 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
5409 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f401xe.h5408 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
5409 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f411xe.h5439 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
5440 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f405xx.h10893 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
10894 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f412cx.h10039 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
10040 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f415xx.h11178 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
11179 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f423xx.h11828 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
11829 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f407xx.h11229 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
11230 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f412zx.h11037 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
11038 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f412rx.h11004 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
11005 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f412vx.h11015 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
11016 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f413xx.h11678 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
11679 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f427xx.h12374 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
12375 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f446xx.h12419 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
12420 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f417xx.h11511 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
11512 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f429xx.h12730 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
12731 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l151xd.h5986 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
5987 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32l152xd.h6128 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
6129 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32l162xd.h6267 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
6268 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f103xe.h5659 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
5660 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f103xg.h5729 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
5730 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h10627 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
10628 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f205xx.h10372 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
10373 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f207xx.h10707 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
10708 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */
Dstm32f217xx.h10962 #define SDIO_DCTRL_RWSTOP_Pos (9U) macro
10963 #define SDIO_DCTRL_RWSTOP_Msk (0x1UL << SDIO_DCTRL_RWSTOP_Pos) /*!< 0x00000200 */

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