/hal_stm32-latest/stm32cube/stm32f0xx/soc/ |
D | stm32f030x6.h | 3567 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 3568 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32f030x8.h | 3611 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 3612 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32f070x6.h | 3647 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 3648 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32f031x6.h | 3694 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 3695 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32f030xc.h | 3937 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 3938 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32f038xx.h | 3666 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 3667 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32f070xb.h | 3805 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 3806 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32f058xx.h | 4166 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4167 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32f051x8.h | 4194 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4195 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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/hal_stm32-latest/stm32cube/stm32l0xx/soc/ |
D | stm32l041xx.h | 4408 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4409 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32l010x8.h | 4098 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4099 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32l010xb.h | 4131 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4132 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32l011xx.h | 4163 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4164 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32l021xx.h | 4300 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4301 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32l031xx.h | 4271 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4272 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32l051xx.h | 4395 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4396 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32l010x4.h | 4054 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4055 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32l010x6.h | 4091 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4092 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32l081xx.h | 4651 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4652 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32l071xx.h | 4514 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4515 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32l052xx.h | 4788 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4789 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32l062xx.h | 4925 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4926 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32l053xx.h | 4941 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4942 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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/hal_stm32-latest/stm32cube/stm32c0xx/soc/ |
D | stm32c011xx.h | 4517 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4518 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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D | stm32c031xx.h | 4680 #define RTC_SHIFTR_ADD1S_Pos (31U) macro 4681 #define RTC_SHIFTR_ADD1S_Msk (0x1UL << RTC_SHIFTR_ADD1S_Pos) /*!< 0x80000000 */
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