Searched refs:RI_ASMR5_PG_Pos (Results 1 – 16 of 16) sorted by relevance
6231 #define RI_ASMR5_PG_Pos (0U) macro6232 #define RI_ASMR5_PG_Msk (0xFFFFUL << RI_ASMR5_PG_Pos) /*!< 0x0000FFFF */6234 #define RI_ASMR5_PG_0 (0x0001UL << RI_ASMR5_PG_Pos) /*!< 0x00000001 */6235 #define RI_ASMR5_PG_1 (0x0002UL << RI_ASMR5_PG_Pos) /*!< 0x00000002 */6236 #define RI_ASMR5_PG_2 (0x0004UL << RI_ASMR5_PG_Pos) /*!< 0x00000004 */6237 #define RI_ASMR5_PG_3 (0x0008UL << RI_ASMR5_PG_Pos) /*!< 0x00000008 */6238 #define RI_ASMR5_PG_4 (0x0010UL << RI_ASMR5_PG_Pos) /*!< 0x00000010 */6239 #define RI_ASMR5_PG_5 (0x0020UL << RI_ASMR5_PG_Pos) /*!< 0x00000020 */6240 #define RI_ASMR5_PG_6 (0x0040UL << RI_ASMR5_PG_Pos) /*!< 0x00000040 */6241 #define RI_ASMR5_PG_7 (0x0080UL << RI_ASMR5_PG_Pos) /*!< 0x00000080 */[all …]
6420 #define RI_ASMR5_PG_Pos (0U) macro6421 #define RI_ASMR5_PG_Msk (0xFFFFUL << RI_ASMR5_PG_Pos) /*!< 0x0000FFFF */6423 #define RI_ASMR5_PG_0 (0x0001UL << RI_ASMR5_PG_Pos) /*!< 0x00000001 */6424 #define RI_ASMR5_PG_1 (0x0002UL << RI_ASMR5_PG_Pos) /*!< 0x00000002 */6425 #define RI_ASMR5_PG_2 (0x0004UL << RI_ASMR5_PG_Pos) /*!< 0x00000004 */6426 #define RI_ASMR5_PG_3 (0x0008UL << RI_ASMR5_PG_Pos) /*!< 0x00000008 */6427 #define RI_ASMR5_PG_4 (0x0010UL << RI_ASMR5_PG_Pos) /*!< 0x00000010 */6428 #define RI_ASMR5_PG_5 (0x0020UL << RI_ASMR5_PG_Pos) /*!< 0x00000020 */6429 #define RI_ASMR5_PG_6 (0x0040UL << RI_ASMR5_PG_Pos) /*!< 0x00000040 */6430 #define RI_ASMR5_PG_7 (0x0080UL << RI_ASMR5_PG_Pos) /*!< 0x00000080 */[all …]
6484 #define RI_ASMR5_PG_Pos (0U) macro6485 #define RI_ASMR5_PG_Msk (0xFFFFUL << RI_ASMR5_PG_Pos) /*!< 0x0000FFFF */6487 #define RI_ASMR5_PG_0 (0x0001UL << RI_ASMR5_PG_Pos) /*!< 0x00000001 */6488 #define RI_ASMR5_PG_1 (0x0002UL << RI_ASMR5_PG_Pos) /*!< 0x00000002 */6489 #define RI_ASMR5_PG_2 (0x0004UL << RI_ASMR5_PG_Pos) /*!< 0x00000004 */6490 #define RI_ASMR5_PG_3 (0x0008UL << RI_ASMR5_PG_Pos) /*!< 0x00000008 */6491 #define RI_ASMR5_PG_4 (0x0010UL << RI_ASMR5_PG_Pos) /*!< 0x00000010 */6492 #define RI_ASMR5_PG_5 (0x0020UL << RI_ASMR5_PG_Pos) /*!< 0x00000020 */6493 #define RI_ASMR5_PG_6 (0x0040UL << RI_ASMR5_PG_Pos) /*!< 0x00000040 */6494 #define RI_ASMR5_PG_7 (0x0080UL << RI_ASMR5_PG_Pos) /*!< 0x00000080 */[all …]
6549 #define RI_ASMR5_PG_Pos (0U) macro6550 #define RI_ASMR5_PG_Msk (0xFFFFUL << RI_ASMR5_PG_Pos) /*!< 0x0000FFFF */6552 #define RI_ASMR5_PG_0 (0x0001UL << RI_ASMR5_PG_Pos) /*!< 0x00000001 */6553 #define RI_ASMR5_PG_1 (0x0002UL << RI_ASMR5_PG_Pos) /*!< 0x00000002 */6554 #define RI_ASMR5_PG_2 (0x0004UL << RI_ASMR5_PG_Pos) /*!< 0x00000004 */6555 #define RI_ASMR5_PG_3 (0x0008UL << RI_ASMR5_PG_Pos) /*!< 0x00000008 */6556 #define RI_ASMR5_PG_4 (0x0010UL << RI_ASMR5_PG_Pos) /*!< 0x00000010 */6557 #define RI_ASMR5_PG_5 (0x0020UL << RI_ASMR5_PG_Pos) /*!< 0x00000020 */6558 #define RI_ASMR5_PG_6 (0x0040UL << RI_ASMR5_PG_Pos) /*!< 0x00000040 */6559 #define RI_ASMR5_PG_7 (0x0080UL << RI_ASMR5_PG_Pos) /*!< 0x00000080 */[all …]
6634 #define RI_ASMR5_PG_Pos (0U) macro6635 #define RI_ASMR5_PG_Msk (0xFFFFUL << RI_ASMR5_PG_Pos) /*!< 0x0000FFFF */6637 #define RI_ASMR5_PG_0 (0x0001UL << RI_ASMR5_PG_Pos) /*!< 0x00000001 */6638 #define RI_ASMR5_PG_1 (0x0002UL << RI_ASMR5_PG_Pos) /*!< 0x00000002 */6639 #define RI_ASMR5_PG_2 (0x0004UL << RI_ASMR5_PG_Pos) /*!< 0x00000004 */6640 #define RI_ASMR5_PG_3 (0x0008UL << RI_ASMR5_PG_Pos) /*!< 0x00000008 */6641 #define RI_ASMR5_PG_4 (0x0010UL << RI_ASMR5_PG_Pos) /*!< 0x00000010 */6642 #define RI_ASMR5_PG_5 (0x0020UL << RI_ASMR5_PG_Pos) /*!< 0x00000020 */6643 #define RI_ASMR5_PG_6 (0x0040UL << RI_ASMR5_PG_Pos) /*!< 0x00000040 */6644 #define RI_ASMR5_PG_7 (0x0080UL << RI_ASMR5_PG_Pos) /*!< 0x00000080 */[all …]
6699 #define RI_ASMR5_PG_Pos (0U) macro6700 #define RI_ASMR5_PG_Msk (0xFFFFUL << RI_ASMR5_PG_Pos) /*!< 0x0000FFFF */6702 #define RI_ASMR5_PG_0 (0x0001UL << RI_ASMR5_PG_Pos) /*!< 0x00000001 */6703 #define RI_ASMR5_PG_1 (0x0002UL << RI_ASMR5_PG_Pos) /*!< 0x00000002 */6704 #define RI_ASMR5_PG_2 (0x0004UL << RI_ASMR5_PG_Pos) /*!< 0x00000004 */6705 #define RI_ASMR5_PG_3 (0x0008UL << RI_ASMR5_PG_Pos) /*!< 0x00000008 */6706 #define RI_ASMR5_PG_4 (0x0010UL << RI_ASMR5_PG_Pos) /*!< 0x00000010 */6707 #define RI_ASMR5_PG_5 (0x0020UL << RI_ASMR5_PG_Pos) /*!< 0x00000020 */6708 #define RI_ASMR5_PG_6 (0x0040UL << RI_ASMR5_PG_Pos) /*!< 0x00000040 */6709 #define RI_ASMR5_PG_7 (0x0080UL << RI_ASMR5_PG_Pos) /*!< 0x00000080 */[all …]
6688 #define RI_ASMR5_PG_Pos (0U) macro6689 #define RI_ASMR5_PG_Msk (0xFFFFUL << RI_ASMR5_PG_Pos) /*!< 0x0000FFFF */6691 #define RI_ASMR5_PG_0 (0x0001UL << RI_ASMR5_PG_Pos) /*!< 0x00000001 */6692 #define RI_ASMR5_PG_1 (0x0002UL << RI_ASMR5_PG_Pos) /*!< 0x00000002 */6693 #define RI_ASMR5_PG_2 (0x0004UL << RI_ASMR5_PG_Pos) /*!< 0x00000004 */6694 #define RI_ASMR5_PG_3 (0x0008UL << RI_ASMR5_PG_Pos) /*!< 0x00000008 */6695 #define RI_ASMR5_PG_4 (0x0010UL << RI_ASMR5_PG_Pos) /*!< 0x00000010 */6696 #define RI_ASMR5_PG_5 (0x0020UL << RI_ASMR5_PG_Pos) /*!< 0x00000020 */6697 #define RI_ASMR5_PG_6 (0x0040UL << RI_ASMR5_PG_Pos) /*!< 0x00000040 */6698 #define RI_ASMR5_PG_7 (0x0080UL << RI_ASMR5_PG_Pos) /*!< 0x00000080 */[all …]
6773 #define RI_ASMR5_PG_Pos (0U) macro6774 #define RI_ASMR5_PG_Msk (0xFFFFUL << RI_ASMR5_PG_Pos) /*!< 0x0000FFFF */6776 #define RI_ASMR5_PG_0 (0x0001UL << RI_ASMR5_PG_Pos) /*!< 0x00000001 */6777 #define RI_ASMR5_PG_1 (0x0002UL << RI_ASMR5_PG_Pos) /*!< 0x00000002 */6778 #define RI_ASMR5_PG_2 (0x0004UL << RI_ASMR5_PG_Pos) /*!< 0x00000004 */6779 #define RI_ASMR5_PG_3 (0x0008UL << RI_ASMR5_PG_Pos) /*!< 0x00000008 */6780 #define RI_ASMR5_PG_4 (0x0010UL << RI_ASMR5_PG_Pos) /*!< 0x00000010 */6781 #define RI_ASMR5_PG_5 (0x0020UL << RI_ASMR5_PG_Pos) /*!< 0x00000020 */6782 #define RI_ASMR5_PG_6 (0x0040UL << RI_ASMR5_PG_Pos) /*!< 0x00000040 */6783 #define RI_ASMR5_PG_7 (0x0080UL << RI_ASMR5_PG_Pos) /*!< 0x00000080 */[all …]
6838 #define RI_ASMR5_PG_Pos (0U) macro6839 #define RI_ASMR5_PG_Msk (0xFFFFUL << RI_ASMR5_PG_Pos) /*!< 0x0000FFFF */6841 #define RI_ASMR5_PG_0 (0x0001UL << RI_ASMR5_PG_Pos) /*!< 0x00000001 */6842 #define RI_ASMR5_PG_1 (0x0002UL << RI_ASMR5_PG_Pos) /*!< 0x00000002 */6843 #define RI_ASMR5_PG_2 (0x0004UL << RI_ASMR5_PG_Pos) /*!< 0x00000004 */6844 #define RI_ASMR5_PG_3 (0x0008UL << RI_ASMR5_PG_Pos) /*!< 0x00000008 */6845 #define RI_ASMR5_PG_4 (0x0010UL << RI_ASMR5_PG_Pos) /*!< 0x00000010 */6846 #define RI_ASMR5_PG_5 (0x0020UL << RI_ASMR5_PG_Pos) /*!< 0x00000020 */6847 #define RI_ASMR5_PG_6 (0x0040UL << RI_ASMR5_PG_Pos) /*!< 0x00000040 */6848 #define RI_ASMR5_PG_7 (0x0080UL << RI_ASMR5_PG_Pos) /*!< 0x00000080 */[all …]
7184 #define RI_ASMR5_PG_Pos (0U) macro7185 #define RI_ASMR5_PG_Msk (0xFFFFUL << RI_ASMR5_PG_Pos) /*!< 0x0000FFFF */7187 #define RI_ASMR5_PG_0 (0x0001UL << RI_ASMR5_PG_Pos) /*!< 0x00000001 */7188 #define RI_ASMR5_PG_1 (0x0002UL << RI_ASMR5_PG_Pos) /*!< 0x00000002 */7189 #define RI_ASMR5_PG_2 (0x0004UL << RI_ASMR5_PG_Pos) /*!< 0x00000004 */7190 #define RI_ASMR5_PG_3 (0x0008UL << RI_ASMR5_PG_Pos) /*!< 0x00000008 */7191 #define RI_ASMR5_PG_4 (0x0010UL << RI_ASMR5_PG_Pos) /*!< 0x00000010 */7192 #define RI_ASMR5_PG_5 (0x0020UL << RI_ASMR5_PG_Pos) /*!< 0x00000020 */7193 #define RI_ASMR5_PG_6 (0x0040UL << RI_ASMR5_PG_Pos) /*!< 0x00000040 */7194 #define RI_ASMR5_PG_7 (0x0080UL << RI_ASMR5_PG_Pos) /*!< 0x00000080 */[all …]
7334 #define RI_ASMR5_PG_Pos (0U) macro7335 #define RI_ASMR5_PG_Msk (0xFFFFUL << RI_ASMR5_PG_Pos) /*!< 0x0000FFFF */7337 #define RI_ASMR5_PG_0 (0x0001UL << RI_ASMR5_PG_Pos) /*!< 0x00000001 */7338 #define RI_ASMR5_PG_1 (0x0002UL << RI_ASMR5_PG_Pos) /*!< 0x00000002 */7339 #define RI_ASMR5_PG_2 (0x0004UL << RI_ASMR5_PG_Pos) /*!< 0x00000004 */7340 #define RI_ASMR5_PG_3 (0x0008UL << RI_ASMR5_PG_Pos) /*!< 0x00000008 */7341 #define RI_ASMR5_PG_4 (0x0010UL << RI_ASMR5_PG_Pos) /*!< 0x00000010 */7342 #define RI_ASMR5_PG_5 (0x0020UL << RI_ASMR5_PG_Pos) /*!< 0x00000020 */7343 #define RI_ASMR5_PG_6 (0x0040UL << RI_ASMR5_PG_Pos) /*!< 0x00000040 */7344 #define RI_ASMR5_PG_7 (0x0080UL << RI_ASMR5_PG_Pos) /*!< 0x00000080 */[all …]
7473 #define RI_ASMR5_PG_Pos (0U) macro7474 #define RI_ASMR5_PG_Msk (0xFFFFUL << RI_ASMR5_PG_Pos) /*!< 0x0000FFFF */7476 #define RI_ASMR5_PG_0 (0x0001UL << RI_ASMR5_PG_Pos) /*!< 0x00000001 */7477 #define RI_ASMR5_PG_1 (0x0002UL << RI_ASMR5_PG_Pos) /*!< 0x00000002 */7478 #define RI_ASMR5_PG_2 (0x0004UL << RI_ASMR5_PG_Pos) /*!< 0x00000004 */7479 #define RI_ASMR5_PG_3 (0x0008UL << RI_ASMR5_PG_Pos) /*!< 0x00000008 */7480 #define RI_ASMR5_PG_4 (0x0010UL << RI_ASMR5_PG_Pos) /*!< 0x00000010 */7481 #define RI_ASMR5_PG_5 (0x0020UL << RI_ASMR5_PG_Pos) /*!< 0x00000020 */7482 #define RI_ASMR5_PG_6 (0x0040UL << RI_ASMR5_PG_Pos) /*!< 0x00000040 */7483 #define RI_ASMR5_PG_7 (0x0080UL << RI_ASMR5_PG_Pos) /*!< 0x00000080 */[all …]
