Searched refs:RI_ASMR3_PC_Pos (Results 1 – 16 of 16) sorted by relevance
6105 #define RI_ASMR3_PC_Pos (0U) macro6106 #define RI_ASMR3_PC_Msk (0xFFFFUL << RI_ASMR3_PC_Pos) /*!< 0x0000FFFF */6108 #define RI_ASMR3_PC_0 (0x0001UL << RI_ASMR3_PC_Pos) /*!< 0x00000001 */6109 #define RI_ASMR3_PC_1 (0x0002UL << RI_ASMR3_PC_Pos) /*!< 0x00000002 */6110 #define RI_ASMR3_PC_2 (0x0004UL << RI_ASMR3_PC_Pos) /*!< 0x00000004 */6111 #define RI_ASMR3_PC_3 (0x0008UL << RI_ASMR3_PC_Pos) /*!< 0x00000008 */6112 #define RI_ASMR3_PC_4 (0x0010UL << RI_ASMR3_PC_Pos) /*!< 0x00000010 */6113 #define RI_ASMR3_PC_5 (0x0020UL << RI_ASMR3_PC_Pos) /*!< 0x00000020 */6114 #define RI_ASMR3_PC_6 (0x0040UL << RI_ASMR3_PC_Pos) /*!< 0x00000040 */6115 #define RI_ASMR3_PC_7 (0x0080UL << RI_ASMR3_PC_Pos) /*!< 0x00000080 */[all …]
6294 #define RI_ASMR3_PC_Pos (0U) macro6295 #define RI_ASMR3_PC_Msk (0xFFFFUL << RI_ASMR3_PC_Pos) /*!< 0x0000FFFF */6297 #define RI_ASMR3_PC_0 (0x0001UL << RI_ASMR3_PC_Pos) /*!< 0x00000001 */6298 #define RI_ASMR3_PC_1 (0x0002UL << RI_ASMR3_PC_Pos) /*!< 0x00000002 */6299 #define RI_ASMR3_PC_2 (0x0004UL << RI_ASMR3_PC_Pos) /*!< 0x00000004 */6300 #define RI_ASMR3_PC_3 (0x0008UL << RI_ASMR3_PC_Pos) /*!< 0x00000008 */6301 #define RI_ASMR3_PC_4 (0x0010UL << RI_ASMR3_PC_Pos) /*!< 0x00000010 */6302 #define RI_ASMR3_PC_5 (0x0020UL << RI_ASMR3_PC_Pos) /*!< 0x00000020 */6303 #define RI_ASMR3_PC_6 (0x0040UL << RI_ASMR3_PC_Pos) /*!< 0x00000040 */6304 #define RI_ASMR3_PC_7 (0x0080UL << RI_ASMR3_PC_Pos) /*!< 0x00000080 */[all …]
6358 #define RI_ASMR3_PC_Pos (0U) macro6359 #define RI_ASMR3_PC_Msk (0xFFFFUL << RI_ASMR3_PC_Pos) /*!< 0x0000FFFF */6361 #define RI_ASMR3_PC_0 (0x0001UL << RI_ASMR3_PC_Pos) /*!< 0x00000001 */6362 #define RI_ASMR3_PC_1 (0x0002UL << RI_ASMR3_PC_Pos) /*!< 0x00000002 */6363 #define RI_ASMR3_PC_2 (0x0004UL << RI_ASMR3_PC_Pos) /*!< 0x00000004 */6364 #define RI_ASMR3_PC_3 (0x0008UL << RI_ASMR3_PC_Pos) /*!< 0x00000008 */6365 #define RI_ASMR3_PC_4 (0x0010UL << RI_ASMR3_PC_Pos) /*!< 0x00000010 */6366 #define RI_ASMR3_PC_5 (0x0020UL << RI_ASMR3_PC_Pos) /*!< 0x00000020 */6367 #define RI_ASMR3_PC_6 (0x0040UL << RI_ASMR3_PC_Pos) /*!< 0x00000040 */6368 #define RI_ASMR3_PC_7 (0x0080UL << RI_ASMR3_PC_Pos) /*!< 0x00000080 */[all …]
6423 #define RI_ASMR3_PC_Pos (0U) macro6424 #define RI_ASMR3_PC_Msk (0xFFFFUL << RI_ASMR3_PC_Pos) /*!< 0x0000FFFF */6426 #define RI_ASMR3_PC_0 (0x0001UL << RI_ASMR3_PC_Pos) /*!< 0x00000001 */6427 #define RI_ASMR3_PC_1 (0x0002UL << RI_ASMR3_PC_Pos) /*!< 0x00000002 */6428 #define RI_ASMR3_PC_2 (0x0004UL << RI_ASMR3_PC_Pos) /*!< 0x00000004 */6429 #define RI_ASMR3_PC_3 (0x0008UL << RI_ASMR3_PC_Pos) /*!< 0x00000008 */6430 #define RI_ASMR3_PC_4 (0x0010UL << RI_ASMR3_PC_Pos) /*!< 0x00000010 */6431 #define RI_ASMR3_PC_5 (0x0020UL << RI_ASMR3_PC_Pos) /*!< 0x00000020 */6432 #define RI_ASMR3_PC_6 (0x0040UL << RI_ASMR3_PC_Pos) /*!< 0x00000040 */6433 #define RI_ASMR3_PC_7 (0x0080UL << RI_ASMR3_PC_Pos) /*!< 0x00000080 */[all …]
6508 #define RI_ASMR3_PC_Pos (0U) macro6509 #define RI_ASMR3_PC_Msk (0xFFFFUL << RI_ASMR3_PC_Pos) /*!< 0x0000FFFF */6511 #define RI_ASMR3_PC_0 (0x0001UL << RI_ASMR3_PC_Pos) /*!< 0x00000001 */6512 #define RI_ASMR3_PC_1 (0x0002UL << RI_ASMR3_PC_Pos) /*!< 0x00000002 */6513 #define RI_ASMR3_PC_2 (0x0004UL << RI_ASMR3_PC_Pos) /*!< 0x00000004 */6514 #define RI_ASMR3_PC_3 (0x0008UL << RI_ASMR3_PC_Pos) /*!< 0x00000008 */6515 #define RI_ASMR3_PC_4 (0x0010UL << RI_ASMR3_PC_Pos) /*!< 0x00000010 */6516 #define RI_ASMR3_PC_5 (0x0020UL << RI_ASMR3_PC_Pos) /*!< 0x00000020 */6517 #define RI_ASMR3_PC_6 (0x0040UL << RI_ASMR3_PC_Pos) /*!< 0x00000040 */6518 #define RI_ASMR3_PC_7 (0x0080UL << RI_ASMR3_PC_Pos) /*!< 0x00000080 */[all …]
6573 #define RI_ASMR3_PC_Pos (0U) macro6574 #define RI_ASMR3_PC_Msk (0xFFFFUL << RI_ASMR3_PC_Pos) /*!< 0x0000FFFF */6576 #define RI_ASMR3_PC_0 (0x0001UL << RI_ASMR3_PC_Pos) /*!< 0x00000001 */6577 #define RI_ASMR3_PC_1 (0x0002UL << RI_ASMR3_PC_Pos) /*!< 0x00000002 */6578 #define RI_ASMR3_PC_2 (0x0004UL << RI_ASMR3_PC_Pos) /*!< 0x00000004 */6579 #define RI_ASMR3_PC_3 (0x0008UL << RI_ASMR3_PC_Pos) /*!< 0x00000008 */6580 #define RI_ASMR3_PC_4 (0x0010UL << RI_ASMR3_PC_Pos) /*!< 0x00000010 */6581 #define RI_ASMR3_PC_5 (0x0020UL << RI_ASMR3_PC_Pos) /*!< 0x00000020 */6582 #define RI_ASMR3_PC_6 (0x0040UL << RI_ASMR3_PC_Pos) /*!< 0x00000040 */6583 #define RI_ASMR3_PC_7 (0x0080UL << RI_ASMR3_PC_Pos) /*!< 0x00000080 */[all …]
6562 #define RI_ASMR3_PC_Pos (0U) macro6563 #define RI_ASMR3_PC_Msk (0xFFFFUL << RI_ASMR3_PC_Pos) /*!< 0x0000FFFF */6565 #define RI_ASMR3_PC_0 (0x0001UL << RI_ASMR3_PC_Pos) /*!< 0x00000001 */6566 #define RI_ASMR3_PC_1 (0x0002UL << RI_ASMR3_PC_Pos) /*!< 0x00000002 */6567 #define RI_ASMR3_PC_2 (0x0004UL << RI_ASMR3_PC_Pos) /*!< 0x00000004 */6568 #define RI_ASMR3_PC_3 (0x0008UL << RI_ASMR3_PC_Pos) /*!< 0x00000008 */6569 #define RI_ASMR3_PC_4 (0x0010UL << RI_ASMR3_PC_Pos) /*!< 0x00000010 */6570 #define RI_ASMR3_PC_5 (0x0020UL << RI_ASMR3_PC_Pos) /*!< 0x00000020 */6571 #define RI_ASMR3_PC_6 (0x0040UL << RI_ASMR3_PC_Pos) /*!< 0x00000040 */6572 #define RI_ASMR3_PC_7 (0x0080UL << RI_ASMR3_PC_Pos) /*!< 0x00000080 */[all …]
6647 #define RI_ASMR3_PC_Pos (0U) macro6648 #define RI_ASMR3_PC_Msk (0xFFFFUL << RI_ASMR3_PC_Pos) /*!< 0x0000FFFF */6650 #define RI_ASMR3_PC_0 (0x0001UL << RI_ASMR3_PC_Pos) /*!< 0x00000001 */6651 #define RI_ASMR3_PC_1 (0x0002UL << RI_ASMR3_PC_Pos) /*!< 0x00000002 */6652 #define RI_ASMR3_PC_2 (0x0004UL << RI_ASMR3_PC_Pos) /*!< 0x00000004 */6653 #define RI_ASMR3_PC_3 (0x0008UL << RI_ASMR3_PC_Pos) /*!< 0x00000008 */6654 #define RI_ASMR3_PC_4 (0x0010UL << RI_ASMR3_PC_Pos) /*!< 0x00000010 */6655 #define RI_ASMR3_PC_5 (0x0020UL << RI_ASMR3_PC_Pos) /*!< 0x00000020 */6656 #define RI_ASMR3_PC_6 (0x0040UL << RI_ASMR3_PC_Pos) /*!< 0x00000040 */6657 #define RI_ASMR3_PC_7 (0x0080UL << RI_ASMR3_PC_Pos) /*!< 0x00000080 */[all …]
6712 #define RI_ASMR3_PC_Pos (0U) macro6713 #define RI_ASMR3_PC_Msk (0xFFFFUL << RI_ASMR3_PC_Pos) /*!< 0x0000FFFF */6715 #define RI_ASMR3_PC_0 (0x0001UL << RI_ASMR3_PC_Pos) /*!< 0x00000001 */6716 #define RI_ASMR3_PC_1 (0x0002UL << RI_ASMR3_PC_Pos) /*!< 0x00000002 */6717 #define RI_ASMR3_PC_2 (0x0004UL << RI_ASMR3_PC_Pos) /*!< 0x00000004 */6718 #define RI_ASMR3_PC_3 (0x0008UL << RI_ASMR3_PC_Pos) /*!< 0x00000008 */6719 #define RI_ASMR3_PC_4 (0x0010UL << RI_ASMR3_PC_Pos) /*!< 0x00000010 */6720 #define RI_ASMR3_PC_5 (0x0020UL << RI_ASMR3_PC_Pos) /*!< 0x00000020 */6721 #define RI_ASMR3_PC_6 (0x0040UL << RI_ASMR3_PC_Pos) /*!< 0x00000040 */6722 #define RI_ASMR3_PC_7 (0x0080UL << RI_ASMR3_PC_Pos) /*!< 0x00000080 */[all …]
7058 #define RI_ASMR3_PC_Pos (0U) macro7059 #define RI_ASMR3_PC_Msk (0xFFFFUL << RI_ASMR3_PC_Pos) /*!< 0x0000FFFF */7061 #define RI_ASMR3_PC_0 (0x0001UL << RI_ASMR3_PC_Pos) /*!< 0x00000001 */7062 #define RI_ASMR3_PC_1 (0x0002UL << RI_ASMR3_PC_Pos) /*!< 0x00000002 */7063 #define RI_ASMR3_PC_2 (0x0004UL << RI_ASMR3_PC_Pos) /*!< 0x00000004 */7064 #define RI_ASMR3_PC_3 (0x0008UL << RI_ASMR3_PC_Pos) /*!< 0x00000008 */7065 #define RI_ASMR3_PC_4 (0x0010UL << RI_ASMR3_PC_Pos) /*!< 0x00000010 */7066 #define RI_ASMR3_PC_5 (0x0020UL << RI_ASMR3_PC_Pos) /*!< 0x00000020 */7067 #define RI_ASMR3_PC_6 (0x0040UL << RI_ASMR3_PC_Pos) /*!< 0x00000040 */7068 #define RI_ASMR3_PC_7 (0x0080UL << RI_ASMR3_PC_Pos) /*!< 0x00000080 */[all …]
7208 #define RI_ASMR3_PC_Pos (0U) macro7209 #define RI_ASMR3_PC_Msk (0xFFFFUL << RI_ASMR3_PC_Pos) /*!< 0x0000FFFF */7211 #define RI_ASMR3_PC_0 (0x0001UL << RI_ASMR3_PC_Pos) /*!< 0x00000001 */7212 #define RI_ASMR3_PC_1 (0x0002UL << RI_ASMR3_PC_Pos) /*!< 0x00000002 */7213 #define RI_ASMR3_PC_2 (0x0004UL << RI_ASMR3_PC_Pos) /*!< 0x00000004 */7214 #define RI_ASMR3_PC_3 (0x0008UL << RI_ASMR3_PC_Pos) /*!< 0x00000008 */7215 #define RI_ASMR3_PC_4 (0x0010UL << RI_ASMR3_PC_Pos) /*!< 0x00000010 */7216 #define RI_ASMR3_PC_5 (0x0020UL << RI_ASMR3_PC_Pos) /*!< 0x00000020 */7217 #define RI_ASMR3_PC_6 (0x0040UL << RI_ASMR3_PC_Pos) /*!< 0x00000040 */7218 #define RI_ASMR3_PC_7 (0x0080UL << RI_ASMR3_PC_Pos) /*!< 0x00000080 */[all …]
7347 #define RI_ASMR3_PC_Pos (0U) macro7348 #define RI_ASMR3_PC_Msk (0xFFFFUL << RI_ASMR3_PC_Pos) /*!< 0x0000FFFF */7350 #define RI_ASMR3_PC_0 (0x0001UL << RI_ASMR3_PC_Pos) /*!< 0x00000001 */7351 #define RI_ASMR3_PC_1 (0x0002UL << RI_ASMR3_PC_Pos) /*!< 0x00000002 */7352 #define RI_ASMR3_PC_2 (0x0004UL << RI_ASMR3_PC_Pos) /*!< 0x00000004 */7353 #define RI_ASMR3_PC_3 (0x0008UL << RI_ASMR3_PC_Pos) /*!< 0x00000008 */7354 #define RI_ASMR3_PC_4 (0x0010UL << RI_ASMR3_PC_Pos) /*!< 0x00000010 */7355 #define RI_ASMR3_PC_5 (0x0020UL << RI_ASMR3_PC_Pos) /*!< 0x00000020 */7356 #define RI_ASMR3_PC_6 (0x0040UL << RI_ASMR3_PC_Pos) /*!< 0x00000040 */7357 #define RI_ASMR3_PC_7 (0x0080UL << RI_ASMR3_PC_Pos) /*!< 0x00000080 */[all …]
