READ_BIT (reference) in projects: hal_stm32-latest

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Searched refs:READ_BIT (Results 1 – 25 of 1325) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
D	stm32g4xx_hal_rcc.h	520 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN); \ 528 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN); \ 536 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN); \ 544 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CORDICEN); \ 552 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FMACEN); \ 560 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \ 568 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \ 602 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \ 610 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN); \ 618 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN); \ [all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
D	stm32l4xx_hal_rcc.h	641 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN); \ 649 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN); \ 658 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN); \ 667 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \ 675 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \ 683 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN); \ 692 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN); \ 702 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GFXMMUEN); \ 746 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \ 754 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN); \ [all …]
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
D	stm32l5xx_hal_rcc.h	656 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA1EN); \ 664 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2EN); \ 672 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMAMUX1EN); \ 679 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \ 687 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \ 695 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN); \ 703 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GTZCEN); \ 738 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \ 746 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN); \ 754 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN); \ [all …]
D	stm32l5xx_hal_rcc_ex.h	852 #define __HAL_RCC_GET_PLLSAI1CLKOUT_CONFIG(__PLLSAI1_CLOCKOUT__) READ_BIT(RCC->PLLSAI1CFGR, (__PLL… 971 #define __HAL_RCC_GET_PLLSAI2CLKOUT_CONFIG(__PLLSAI2_CLOCKOUT__) READ_BIT(RCC->PLLSAI2CFGR, (__PLL… 1003 #define __HAL_RCC_GET_SAI1_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR2, RCC_CCIPR2_SAI1SEL))) 1029 #define __HAL_RCC_GET_SAI2_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR2, RCC_CCIPR2_SAI2SEL))) 1049 #define __HAL_RCC_GET_I2C1_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_I2C1SEL))) 1069 #define __HAL_RCC_GET_I2C2_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_I2C2SEL))) 1089 #define __HAL_RCC_GET_I2C3_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_I2C3SEL))) 1109 #define __HAL_RCC_GET_I2C4_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR2, RCC_CCIPR2_I2C4SEL))) 1132 #define __HAL_RCC_GET_USART1_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_USART1SEL))) 1154 #define __HAL_RCC_GET_USART2_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR1, RCC_CCIPR1_USART2SEL))) [all …]
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
D	stm32g0xx_hal_rcc.h	863 … tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_DMA1EN); \ 872 … tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_DMA2EN); \ 883 … tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FLASHEN); \ 891 … tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_CRCEN); \ 900 … tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN); \ 910 … tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_AESEN); \ 943 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN); \ 951 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOBEN); \ 959 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN); \ 967 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN); \ [all …]
D	stm32g0xx_ll_system.h	314 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)); in LL_SYSCFG_GetRemapMemory() 370 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_MOD)); in LL_SYSCFG_GetIRModEnvelopeSignal() 395 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_POL)); in LL_SYSCFG_GetIRPolarity() 524 …return ((READ_BIT(SYSCFG->IT_LINE_SR[0], SYSCFG_ITLINE0_SR_EWDG) == (SYSCFG_ITLINE0_SR_EWDG)) ? 1U… in LL_SYSCFG_IsActiveFlag_WWDG() 536 …return ((READ_BIT(SYSCFG->IT_LINE_SR[1], SYSCFG_ITLINE1_SR_PVDOUT) == (SYSCFG_ITLINE1_SR_PVDOUT)) … in LL_SYSCFG_IsActiveFlag_PVDOUT() 548 …return ((READ_BIT(SYSCFG->IT_LINE_SR[1], SYSCFG_ITLINE1_SR_PVMOUT) == (SYSCFG_ITLINE1_SR_PVMOUT)) … in LL_SYSCFG_IsActiveFlag_PVMOUT() 560 …return ((READ_BIT(SYSCFG->IT_LINE_SR[2], SYSCFG_ITLINE2_SR_RTC) == (SYSCFG_ITLINE2_SR_RTC)) ? 1UL … in LL_SYSCFG_IsActiveFlag_RTC_WAKEUP() 572 …return ((READ_BIT(SYSCFG->IT_LINE_SR[2], SYSCFG_ITLINE2_SR_TAMPER) == (SYSCFG_ITLINE2_SR_TAMPER)) … in LL_SYSCFG_IsActiveFlag_TAMPER() 584 …return ((READ_BIT(SYSCFG->IT_LINE_SR[3], SYSCFG_ITLINE3_SR_FLASH_ITF) == (SYSCFG_ITLINE3_SR_FLASH_… in LL_SYSCFG_IsActiveFlag_FLASH_ITF() 596 …return ((READ_BIT(SYSCFG->IT_LINE_SR[3], SYSCFG_ITLINE3_SR_FLASH_ECC) == (SYSCFG_ITLINE3_SR_FLASH_… in LL_SYSCFG_IsActiveFlag_FLASH_ECC() [all …]
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
D	stm32u5xx_hal_rcc.h	679 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPDMA1EN); \ 686 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CORDICEN); \ 693 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FMACEN); \ 700 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN); \ 707 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \ 716 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_JPEGEN); \ 725 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN); \ 732 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \ 740 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_MDF1EN); \ 749 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_DMA2DEN); \ [all …]
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
D	stm32l0xx_hal_rcc_ex.h	585 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_CRYPEN);\ 590 #define __HAL_RCC_AES_IS_CLK_ENABLED() (READ_BIT(RCC->AHBENR, RCC_AHBENR_CRYPEN) != 0U) 591 #define __HAL_RCC_AES_IS_CLK_DISABLED() (READ_BIT(RCC->AHBENR, RCC_AHBENR_CRYPEN) == 0U) 600 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_TSCEN);\ 605 #define __HAL_RCC_TSC_IS_CLK_ENABLED() (READ_BIT(RCC->AHBENR, RCC_AHBENR_TSCEN) != 0U) 606 #define __HAL_RCC_TSC_IS_CLK_DISABLED() (READ_BIT(RCC->AHBENR, RCC_AHBENR_TSCEN) == 0U) 612 tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN);\ 617 #define __HAL_RCC_RNG_IS_CLK_ENABLED() (READ_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN) != 0U) 618 #define __HAL_RCC_RNG_IS_CLK_DISABLED() (READ_BIT(RCC->AHBENR, RCC_AHBENR_RNGEN) == 0U) 637 tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOEEN);\ [all …]
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
D	stm32u0xx_ll_system.h	252 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)); in LL_SYSCFG_GetRemapMemory() 307 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_MOD)); in LL_SYSCFG_GetIRModEnvelopeSignal() 332 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_POL)); in LL_SYSCFG_GetIRPolarity() 428 …return ((READ_BIT(SYSCFG->IT_LINE_SR[0], SYSCFG_ITLINE0_SR_WWDG) == (SYSCFG_ITLINE0_SR_WWDG)) ? 1U… in LL_SYSCFG_IsActiveFlag_WWDG() 438 …return ((READ_BIT(SYSCFG->IT_LINE_SR[1], SYSCFG_ITLINE1_SR_PVDOUT) == (SYSCFG_ITLINE1_SR_PVDOUT)) … in LL_SYSCFG_IsActiveFlag_PVDOUT() 449 …return ((READ_BIT(SYSCFG->IT_LINE_SR[1], SYSCFG_ITLINE1_SR_PVMOUT1) == (SYSCFG_ITLINE1_SR_PVMOUT1)… in LL_SYSCFG_IsActiveFlag_PVMOUT1() 460 …return ((READ_BIT(SYSCFG->IT_LINE_SR[1], SYSCFG_ITLINE1_SR_PVMOUT3) == (SYSCFG_ITLINE1_SR_PVMOUT3)… in LL_SYSCFG_IsActiveFlag_PVMOUT3() 470 …return ((READ_BIT(SYSCFG->IT_LINE_SR[1], SYSCFG_ITLINE1_SR_PVMOUT4) == (SYSCFG_ITLINE1_SR_PVMOUT4)… in LL_SYSCFG_IsActiveFlag_PVMOUT4() 480 …return ((READ_BIT(SYSCFG->IT_LINE_SR[2], SYSCFG_ITLINE2_SR_RTC) == (SYSCFG_ITLINE2_SR_RTC)) ? 1UL … in LL_SYSCFG_IsActiveFlag_RTC_WAKEUP() 490 …return ((READ_BIT(SYSCFG->IT_LINE_SR[2], SYSCFG_ITLINE2_SR_TAMPER) == (SYSCFG_ITLINE2_SR_TAMPER)) … in LL_SYSCFG_IsActiveFlag_TAMPER() [all …]
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
D	stm32h5xx_hal_rcc.h	736 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPDMA1EN); \ 744 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPDMA2EN); \ 753 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CORDICEN); \ 763 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FMACEN); \ 772 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \ 780 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN); \ 788 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLITFEN); \ 797 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHEN);\ 805 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHTXEN);\ 813 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_ETHRXEN);\ [all …]
D	stm32h5xx_ll_i3c.h	678 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_EN) == (I3C_CFGR_EN)) ? 1UL : 0UL); in LL_I3C_IsEnabled() 691 return ((READ_BIT(I3Cx->DEVR0, I3C_DEVR0_RSTVAL) == (I3C_DEVR0_RSTVAL)) ? 1UL : 0UL); in LL_I3C_IsEnabledReset() 719 return (uint32_t)((READ_BIT(I3Cx->CFGR, I3C_CFGR_CRINIT) == (I3C_CFGR_CRINIT)) ? 1UL : 0UL); in LL_I3C_GetMode() 754 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_NOARBH) == (I3C_CFGR_NOARBH)) ? 0UL : 1UL); in LL_I3C_IsEnabledArbitrationHeader() 790 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_RSTPTRN) == (I3C_CFGR_RSTPTRN)) ? 1UL : 0UL); in LL_I3C_IsEnabledResetPattern() 825 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_EXITPTRN) == (I3C_CFGR_EXITPTRN)) ? 1UL : 0UL); in LL_I3C_IsEnabledExitPattern() 861 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_HKSDAEN) == (I3C_CFGR_HKSDAEN)) ? 1UL : 0UL); in LL_I3C_IsEnabledHighKeeperSDA() 898 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_HJACK) == (I3C_CFGR_HJACK)) ? 1UL : 0UL); in LL_I3C_IsEnabledHJAck() 987 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_RXDMAEN) == (I3C_CFGR_RXDMAEN)) ? 1UL : 0UL); in LL_I3C_IsEnabledDMAReq_RX() 1014 return (uint32_t)(READ_BIT(I3Cx->CFGR, I3C_CFGR_RXTHRES)); in LL_I3C_GetRxFIFOThreshold() [all …]
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
D	stm32c0xx_hal_rcc.h	700 … tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_DMA1EN); \ 708 … tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FLASHEN); \ 716 … tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_CRCEN); \ 741 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN); \ 749 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOBEN); \ 757 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN); \ 765 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIODEN); \ 773 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOFEN); \ 801 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM2EN); \ 810 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN); \ [all …]
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
D	stm32f0xx_ll_system.h	363 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)); in LL_SYSCFG_GetRemapMemory() 391 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_MOD)); in LL_SYSCFG_GetIRModEnvelopeSignal() 677 …return (uint32_t)(READ_BIT(SYSCFG->EXTICR[Line & 0xFF], (SYSCFG_EXTICR1_EXTI0 << (Line >> 16))) >>… in LL_SYSCFG_GetEXTISource() 688 return (READ_BIT(SYSCFG->IT_LINE_SR[0], SYSCFG_ITLINE0_SR_EWDG) == (SYSCFG_ITLINE0_SR_EWDG)); in LL_SYSCFG_IsActiveFlag_WWDG() 700 return (READ_BIT(SYSCFG->IT_LINE_SR[1], SYSCFG_ITLINE1_SR_PVDOUT) == (SYSCFG_ITLINE1_SR_PVDOUT)); in LL_SYSCFG_IsActiveFlag_PVDOUT() 712 return (READ_BIT(SYSCFG->IT_LINE_SR[1], SYSCFG_ITLINE1_SR_VDDIO2) == (SYSCFG_ITLINE1_SR_VDDIO2)); in LL_SYSCFG_IsActiveFlag_VDDIO2() 724 …return (READ_BIT(SYSCFG->IT_LINE_SR[2], SYSCFG_ITLINE2_SR_RTC_WAKEUP) == (SYSCFG_ITLINE2_SR_RTC_WA… in LL_SYSCFG_IsActiveFlag_RTC_WAKEUP() 736 …return (READ_BIT(SYSCFG->IT_LINE_SR[2], SYSCFG_ITLINE2_SR_RTC_TSTAMP) == (SYSCFG_ITLINE2_SR_RTC_TS… in LL_SYSCFG_IsActiveFlag_RTC_TSTAMP() 748 …return (READ_BIT(SYSCFG->IT_LINE_SR[2], SYSCFG_ITLINE2_SR_RTC_ALRA) == (SYSCFG_ITLINE2_SR_RTC_ALRA… in LL_SYSCFG_IsActiveFlag_RTC_ALRA() 760 …return (READ_BIT(SYSCFG->IT_LINE_SR[3], SYSCFG_ITLINE3_SR_FLASH_ITF) == (SYSCFG_ITLINE3_SR_FLASH_I… in LL_SYSCFG_IsActiveFlag_FLASH_ITF() [all …]
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
D	stm32wb0x_hal_pwr.h	274 …((__FLAG__) == PWR_FLAG_WUF0) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF0) == PWR_SR1_WUF0) … 275 …((__FLAG__) == PWR_FLAG_WUF1) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF1) == PWR_SR1_WUF1) … 276 …((__FLAG__) == PWR_FLAG_WUF2) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF2) == PWR_SR1_WUF2) … 277 …((__FLAG__) == PWR_FLAG_WUF3) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF3) == PWR_SR1_WUF3) … 278 …((__FLAG__) == PWR_FLAG_WUF4) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF4) == PWR_SR1_WUF4) … 279 …((__FLAG__) == PWR_FLAG_WUF5) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF5) == PWR_SR1_WUF5) … 280 …((__FLAG__) == PWR_FLAG_WUF6) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF6) == PWR_SR1_WUF6) … 281 …((__FLAG__) == PWR_FLAG_WUF7) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF7) == PWR_SR1_WUF7) … 282 …((__FLAG__) == PWR_FLAG_WUF8) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF8) == PWR_SR1_WUF8) … 283 …((__FLAG__) == PWR_FLAG_WUF9) ? (READ_BIT(PWR->SR1, PWR_SR1_WUF9) == PWR_SR1_WUF9) … [all …]
D	stm32wb0x_ll_pwr.h	474 return ((READ_BIT(PWR->CR1, PWR_CR1_ENSDNBOR) == (PWR_CR1_ENSDNBOR)) ? 1UL : 0UL); in LL_PWR_IsEnabledBORinSDN() 500 return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_LPMS)); in LL_PWR_GetPowerMode() 530 return ((READ_BIT(PWR->CR1, PWR_CR1_APC) == (PWR_CR1_APC)) ? 1UL : 0UL); in LL_PWR_IsEnabledPUPDCfg() 563 return ((READ_BIT(PWR->CR2, PWR_CR2_LSILPMUFEN) == (PWR_CR2_LSILPMUFEN)) ? 1UL : 0UL); in LL_PWR_IsEnabledLSILPMU() 595 return ((READ_BIT(PWR->CR2, PWR_CR2_ENTS) == (PWR_CR2_ENTS)) ? 1UL : 0UL); in LL_PWR_IsEnabledTempSens() 631 ram_ret = READ_BIT(PWR->CR2, (PWR_CR2_RAMRET1)); in LL_PWR_GetRAMBankRet() 633 ram_ret \|= READ_BIT(PWR->CR2, (PWR_CR2_RAMRET2)); in LL_PWR_GetRAMBankRet() 636 ram_ret \|= READ_BIT(PWR->CR2, (PWR_CR2_RAMRET3)); in LL_PWR_GetRAMBankRet() 692 return (uint32_t)(READ_BIT(PWR->CR2, PWR_CR2_PVDLS)); in LL_PWR_GetPVDLevel() 722 return ((READ_BIT(PWR->CR2, PWR_CR2_PVDE) == (PWR_CR2_PVDE)) ? 1UL : 0UL); in LL_PWR_IsEnabledPVD() [all …]
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
D	stm32wbxx_hal_rcc.h	2290 #define __HAL_RCC_DMA1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA1SME… 2292 #define __HAL_RCC_DMA2_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2SME… 2294 #define __HAL_RCC_DMAMUX1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMAMUX1… 2295 #define __HAL_RCC_SRAM1_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_SRAM1SM… 2296 #define __HAL_RCC_CRC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_CRCSMEN… 2298 #define __HAL_RCC_TSC_IS_CLK_SLEEP_ENABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_TSCSMEN… 2301 #define __HAL_RCC_DMA1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA1SME… 2303 #define __HAL_RCC_DMA2_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMA2SME… 2305 #define __HAL_RCC_DMAMUX1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_DMAMUX1… 2306 #define __HAL_RCC_SRAM1_IS_CLK_SLEEP_DISABLED() (READ_BIT(RCC->AHB1SMENR, RCC_AHB1SMENR_SRAM1SM… [all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
D	stm32n6xx_ll_i3c.h	678 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_EN) == (I3C_CFGR_EN)) ? 1UL : 0UL); in LL_I3C_IsEnabled() 691 return ((READ_BIT(I3Cx->DEVR0, I3C_DEVR0_RSTVAL) == (I3C_DEVR0_RSTVAL)) ? 1UL : 0UL); in LL_I3C_IsEnabledReset() 719 return (uint32_t)((READ_BIT(I3Cx->CFGR, I3C_CFGR_CRINIT) == (I3C_CFGR_CRINIT)) ? 1UL : 0UL); in LL_I3C_GetMode() 754 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_NOARBH) == (I3C_CFGR_NOARBH)) ? 0UL : 1UL); in LL_I3C_IsEnabledArbitrationHeader() 790 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_RSTPTRN) == (I3C_CFGR_RSTPTRN)) ? 1UL : 0UL); in LL_I3C_IsEnabledResetPattern() 825 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_EXITPTRN) == (I3C_CFGR_EXITPTRN)) ? 1UL : 0UL); in LL_I3C_IsEnabledExitPattern() 861 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_HKSDAEN) == (I3C_CFGR_HKSDAEN)) ? 1UL : 0UL); in LL_I3C_IsEnabledHighKeeperSDA() 898 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_HJACK) == (I3C_CFGR_HJACK)) ? 1UL : 0UL); in LL_I3C_IsEnabledHJAck() 987 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_RXDMAEN) == (I3C_CFGR_RXDMAEN)) ? 1UL : 0UL); in LL_I3C_IsEnabledDMAReq_RX() 1014 return (uint32_t)(READ_BIT(I3Cx->CFGR, I3C_CFGR_RXTHRES)); in LL_I3C_GetRxFIFOThreshold() [all …]
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
D	stm32h7rsxx_ll_i3c.h	681 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_EN) == (I3C_CFGR_EN)) ? 1UL : 0UL); in LL_I3C_IsEnabled() 694 return ((READ_BIT(I3Cx->DEVR0, I3C_DEVR0_RSTVAL) == (I3C_DEVR0_RSTVAL)) ? 1UL : 0UL); in LL_I3C_IsEnabledReset() 722 return (uint32_t)((READ_BIT(I3Cx->CFGR, I3C_CFGR_CRINIT) == (I3C_CFGR_CRINIT)) ? 1UL : 0UL); in LL_I3C_GetMode() 757 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_NOARBH) == (I3C_CFGR_NOARBH)) ? 0UL : 1UL); in LL_I3C_IsEnabledArbitrationHeader() 793 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_RSTPTRN) == (I3C_CFGR_RSTPTRN)) ? 1UL : 0UL); in LL_I3C_IsEnabledResetPattern() 828 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_EXITPTRN) == (I3C_CFGR_EXITPTRN)) ? 1UL : 0UL); in LL_I3C_IsEnabledExitPattern() 864 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_HKSDAEN) == (I3C_CFGR_HKSDAEN)) ? 1UL : 0UL); in LL_I3C_IsEnabledHighKeeperSDA() 901 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_HJACK) == (I3C_CFGR_HJACK)) ? 1UL : 0UL); in LL_I3C_IsEnabledHJAck() 990 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_RXDMAEN) == (I3C_CFGR_RXDMAEN)) ? 1UL : 0UL); in LL_I3C_IsEnabledDMAReq_RX() 1017 return (uint32_t)(READ_BIT(I3Cx->CFGR, I3C_CFGR_RXTHRES)); in LL_I3C_GetRxFIFOThreshold() [all …]
D	stm32h7rsxx_ll_rcc.h	1378 return ((READ_BIT(RCC->CR, RCC_CR_HSERDY) == RCC_CR_HSERDY) ? 1UL : 0UL); in LL_RCC_HSE_IsReady() 1416 return ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RCC_CR_HSIRDY) ? 1UL : 0UL); in LL_RCC_HSI_IsReady() 1426 return ((READ_BIT(RCC->CR, RCC_CR_HSIDIVF) == RCC_CR_HSIDIVF) ? 1UL : 0UL); in LL_RCC_HSI_IsDividerReady() 1455 return (READ_BIT(RCC->CR, RCC_CR_HSIDIV)); in LL_RCC_HSI_GetDivider() 1485 return ((READ_BIT(RCC->CR, RCC_CR_HSIKERON) == (RCC_CR_HSIKERON)) ? 1UL : 0UL); in LL_RCC_HSI_IsEnabledStopMode() 1515 return ((READ_BIT(RCC->CKPROTR, RCC_CKPROTR_XSPICKP) == (RCC_CKPROTR_XSPICKP)) ? 1UL : 0UL); in LL_RCC_IsEnabledXSPIClockProtection() 1545 return ((READ_BIT(RCC->CKPROTR, RCC_CKPROTR_FMCCKP) == (RCC_CKPROTR_FMCCKP)) ? 1UL : 0UL); in LL_RCC_IsEnabledFMCClockProtection() 1560 return (READ_BIT(RCC->CKPROTR, RCC_CKPROTR_XSPI2SWP)); in LL_RCC_GetXSPI2SwitchPosition() 1575 return (READ_BIT(RCC->CKPROTR, RCC_CKPROTR_XSPI1SWP)); in LL_RCC_GetXSPI1SwitchPosition() 1591 return (READ_BIT(RCC->CKPROTR, RCC_CKPROTR_FMCSWP)); in LL_RCC_GetFMCSwitchPosition() [all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
D	stm32l4xx_hal_rcc.c	278 while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) == 0U) in HAL_RCC_DeInit() 306 while(READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RCC_CFGR_SWS_MSI) in HAL_RCC_DeInit() 335 while(READ_BIT(RCC->CR, RCC_CR_PLLRDY \| RCC_CR_PLLSAI1RDY \| RCC_CR_PLLSAI2RDY) != 0U) in HAL_RCC_DeInit() 339 while(READ_BIT(RCC->CR, RCC_CR_PLLRDY \| RCC_CR_PLLSAI1RDY) != 0U) in HAL_RCC_DeInit() 343 while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) in HAL_RCC_DeInit() 435 if((READ_BIT(RCC->CR, RCC_CR_MSIRDY) != 0U) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF)) in HAL_RCC_OscConfig() 479 …SystemCoreClock = HAL_RCC_GetSysClockFreq() >> (AHBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) >… in HAL_RCC_OscConfig() 501 while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) == 0U) in HAL_RCC_OscConfig() 523 while(READ_BIT(RCC->CR, RCC_CR_MSIRDY) != 0U) in HAL_RCC_OscConfig() 543 if((READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) in HAL_RCC_OscConfig() [all …]
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
D	stm32wbaxx_hal_rcc.h	572 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GPDMA1EN); \ 580 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_FLASHEN); \ 588 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_CRCEN); \ 597 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_TSCEN); \ 606 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_RAMCFGEN); \ 615 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_GTZC1EN); \ 624 … tmpreg = READ_BIT(RCC->AHB1ENR, RCC_AHB1ENR_SRAM1EN); \ 654 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); \ 662 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN); \ 670 … tmpreg = READ_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOCEN); \ [all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
D	stm32h7xx_ll_system.h	466 return (uint32_t)(READ_BIT(SYSCFG->PMCR, SYSCFG_PMCR_EPIS_SEL)); in LL_SYSCFG_GetPHYInterface() 662 …return (uint32_t)(READ_BIT(SYSCFG->EXTICR[Line & 0x3U], (Line >> 16U)) >> (POSITION_VAL(Line >> 16… in LL_SYSCFG_GetEXTISource() 750 …return (uint32_t)(READ_BIT(SYSCFG->CFGR, SYSCFG_CFGR_AXISRAML \| SYSCFG_CFGR_ITCML \| SYSCFG_CFGR_… in LL_SYSCFG_GetTIMBreakInputs() 755 …return (uint32_t)(READ_BIT(SYSCFG->CFGR, SYSCFG_CFGR_AXISRAML \| SYSCFG_CFGR_ITCML \| SYSCFG_CFGR_… in LL_SYSCFG_GetTIMBreakInputs() 760 …return (uint32_t)(READ_BIT(SYSCFG->CFGR, SYSCFG_CFGR_AXISRAML \| SYSCFG_CFGR_ITCML \| SYSCFG_CFGR_… in LL_SYSCFG_GetTIMBreakInputs() 765 …return (uint32_t)(READ_BIT(SYSCFG->CFGR, SYSCFG_CFGR_ITCML \| SYSCFG_CFGR_DTCML \| SYSCFG_CFGR_… in LL_SYSCFG_GetTIMBreakInputs() 801 return ((READ_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN) == SYSCFG_CCCSR_EN) ? 1UL : 0UL); in LL_SYSCFG_IsEnabledCompensationCell() 811 return ((READ_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_READY) == (SYSCFG_CCCSR_READY)) ? 1UL : 0UL); in LL_SYSCFG_IsActiveFlag_CMPCR() 939 return ((READ_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_HSLV) == SYSCFG_CCCSR_HSLV) ? 1UL : 0UL); in LL_SYSCFG_IsEnabledIOSpeedOptimization() 941 return ((READ_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_HSLV0) == SYSCFG_CCCSR_HSLV0) ? 1UL : 0UL); in LL_SYSCFG_IsEnabledIOSpeedOptimization() [all …]
D	stm32h7xx_ll_rcc.h	1688 return ((READ_BIT(RCC->CR, RCC_CR_HSERDY) == (RCC_CR_HSERDY)) ? 1UL : 0UL); in LL_RCC_HSE_IsReady() 1726 return ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) == (RCC_CR_HSIRDY)) ? 1UL : 0UL); in LL_RCC_HSI_IsReady() 1736 return ((READ_BIT(RCC->CR, RCC_CR_HSIDIVF) == (RCC_CR_HSIDIVF)) ? 1UL : 0UL); in LL_RCC_HSI_IsDividerReady() 1765 return (READ_BIT(RCC->CR, RCC_CR_HSIDIV)); in LL_RCC_HSI_GetDivider() 1797 return (uint32_t)(READ_BIT(RCC->HSICFGR, RCC_HSICFGR_HSICAL) >> RCC_HSICFGR_HSICAL_Pos); in LL_RCC_HSI_GetCalibration() 1838 return (uint32_t)(READ_BIT(RCC->HSICFGR, 0x3F000U) >> 12U); in LL_RCC_HSI_GetCalibTrimming() 1843 return (uint32_t)(READ_BIT(RCC->HSICFGR, RCC_HSICFGR_HSITRIM) >> RCC_HSICFGR_HSITRIM_Pos); in LL_RCC_HSI_GetCalibTrimming() 1846 return (uint32_t)(READ_BIT(RCC->HSICFGR, RCC_HSICFGR_HSITRIM) >> RCC_HSICFGR_HSITRIM_Pos); in LL_RCC_HSI_GetCalibTrimming() 1885 return ((READ_BIT(RCC->CR, RCC_CR_CSIRDY) == (RCC_CR_CSIRDY)) ? 1UL : 0UL); in LL_RCC_CSI_IsReady() 1921 return (uint32_t)(READ_BIT(RCC->HSICFGR, 0x3FC0000U) >> 18U); in LL_RCC_CSI_GetCalibration() [all …]
D	stm32h7xx_ll_pwr.h	375 return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_LPDS)); in LL_PWR_GetRegulModeDS() 405 return ((READ_BIT(PWR->CR1, PWR_CR1_PVDEN) == (PWR_CR1_PVDEN)) ? 1UL : 0UL); in LL_PWR_IsEnabledPVD() 442 return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_PLS)); in LL_PWR_GetPVDLevel() 472 return ((READ_BIT(PWR->CR1, PWR_CR1_DBP) == (PWR_CR1_DBP)) ? 1UL : 0UL); in LL_PWR_IsEnabledBkUpAccess() 502 return ((READ_BIT(PWR->CR1, PWR_CR1_FLPS) == (PWR_CR1_FLPS)) ? 1UL : 0UL); in LL_PWR_IsEnabledFlashPowerDown() 533 return ((READ_BIT(PWR->CR1, PWR_CR1_BOOSTE) == (PWR_CR1_BOOSTE)) ? 1UL : 0UL); in LL_PWR_IsEnabledAnalogBooster() 565 return ((READ_BIT(PWR->CR1, PWR_CR1_AVD_READY) == (PWR_CR1_AVD_READY)) ? 1UL : 0UL); in LL_PWR_IsEnabledAnalogVoltageReady() 593 return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_SVOS)); in LL_PWR_GetStopModeRegulVoltageScaling() 623 return ((READ_BIT(PWR->CR1, PWR_CR1_AVDEN) == (PWR_CR1_AVDEN)) ? 1UL : 0UL); in LL_PWR_IsEnabledAVD() 652 return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_ALS)); in LL_PWR_GetAVDLevel() [all …]
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
D	stm32wlxx_ll_pwr.h	364 return ((READ_BIT(PWR->CR1, PWR_CR1_LPR) == (PWR_CR1_LPR)) ? 1UL : 0UL); in LL_PWR_IsEnabledLowPowerRunMode() 393 return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_VOS)); in LL_PWR_GetRegulVoltageScaling() 423 return ((READ_BIT(PWR->CR1, PWR_CR1_DBP) == (PWR_CR1_DBP)) ? 1UL : 0UL); in LL_PWR_IsEnabledBkUpAccess() 454 return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_LPMS)); in LL_PWR_GetPowerMode() 483 return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_FPDR)); in LL_PWR_GetFlashPowerModeLPRun() 508 return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_FPDS)); in LL_PWR_GetFlashPowerModeSleep() 544 return ((READ_BIT(PWR->CR2, PeriphVoltage) == (PeriphVoltage)) ? 1UL : 0UL); in LL_PWR_IsEnabledPVM() 581 return (uint32_t)(READ_BIT(PWR->CR2, PWR_CR2_PLS)); in LL_PWR_GetPVDLevel() 611 return ((READ_BIT(PWR->CR2, PWR_CR2_PVDE) == (PWR_CR2_PVDE)) ? 1UL : 0UL); in LL_PWR_IsEnabledPVD() 637 return (uint32_t)(READ_BIT(PWR->CR5, PWR_CR5_RFEOLEN)); in LL_PWR_GetRadioEOL() [all …]

12 3 4 5 6 7 8 9 10 >>...53

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