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Searched refs:RCC_PLL3DIVR_PLL3R_Pos (Results 1 – 23 of 23) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_rcc.h4857 RCC_PLL3DIVR_PLL3R_Pos)); in LL_RCC_PLL3_ConfigDomain_HSPI_LTDC()
4965 MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3R, (PLL3R - 1UL) << RCC_PLL3DIVR_PLL3R_Pos); in LL_RCC_PLL3_SetR()
4976 return (uint32_t)((READ_BIT(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3R) >> RCC_PLL3DIVR_PLL3R_Pos) + 1UL); in LL_RCC_PLL3_GetR()
Dstm32u5xx_hal_rcc_ex.h1359 ((((__PLL3R__)- 1U) << RCC_PLL3DIVR_PLL3R_Pos) & RCC_PLL3DIVR_PLL3R))); \
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h5042 MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3R, (PLL3R - 1UL) << RCC_PLL3DIVR_PLL3R_Pos); in LL_RCC_PLL3_SetR()
5053 return (uint32_t)((READ_BIT(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3R) >> RCC_PLL3DIVR_PLL3R_Pos) + 1UL); in LL_RCC_PLL3_GetR()
Dstm32h5xx_hal_rcc_ex.h1677 … ((((__PLL3R__) - 1U) << RCC_PLL3DIVR_PLL3R_Pos) & RCC_PLL3DIVR_PLL3R))); \
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc_ex.c1349 …Init->PLL3.PLL3R = (uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_PLL3R) >> RCC_PLL3DIVR_PLL3R_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig()
1740 … RCC_PLL3DIVR_PLL3R) >> RCC_PLL3DIVR_PLL3R_Pos) + \ in HAL_RCCEx_GetPLL3ClockFreq()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc_ex.c2562 …Init->PLL3.PLL3R = (uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_PLL3R) >> RCC_PLL3DIVR_PLL3R_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig()
3146 … RCC_PLL3DIVR_PLL3R_Pos) + \ in HAL_RCCEx_GetPLL3ClockFreq()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h12889 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
12890 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
12892 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
12893 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
12894 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
12895 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
12896 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
12897 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
12898 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…
Dstm32h562xx.h13569 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
13570 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
13572 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
13573 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
13574 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
13575 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
13576 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
13577 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
13578 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…
Dstm32h533xx.h13408 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
13409 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
13411 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
13412 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
13413 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
13414 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
13415 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
13416 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
13417 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…
Dstm32h573xx.h16172 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
16173 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
16175 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
16176 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
16177 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
16178 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
16179 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
16180 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
16181 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…
Dstm32h563xx.h15653 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
15654 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
15656 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
15657 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
15658 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
15659 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
15660 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
15661 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
15662 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h14729 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
14730 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
14732 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
14733 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
14734 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
14735 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
14736 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
14737 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
14738 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…
Dstm32u535xx.h14216 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
14217 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
14219 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
14220 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
14221 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
14222 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
14223 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
14224 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
14225 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…
Dstm32u575xx.h15624 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
15625 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
15627 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
15628 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
15629 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
15630 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
15631 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
15632 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
15633 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…
Dstm32u585xx.h16186 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
16187 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
16189 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
16190 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
16191 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
16192 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
16193 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
16194 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
16195 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…
Dstm32u595xx.h16652 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
16653 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
16655 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
16656 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
16657 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
16658 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
16659 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
16660 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
16661 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…
Dstm32u5a5xx.h17214 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
17215 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
17217 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
17218 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
17219 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
17220 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
17221 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
17222 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
17223 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…
Dstm32u5f7xx.h18185 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
18186 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
18188 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
18189 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
18190 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
18191 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
18192 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
18193 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
18194 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…
Dstm32u599xx.h20378 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
20379 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
20381 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
20382 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
20383 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
20384 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
20385 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
20386 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
20387 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…
Dstm32u5g7xx.h18747 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
18748 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
18750 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
18751 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
18752 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
18753 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
18754 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
18755 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
18756 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…
Dstm32u5f9xx.h21314 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
21315 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
21317 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
21318 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
21319 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
21320 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
21321 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
21322 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
21323 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…
Dstm32u5a9xx.h20940 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
20941 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
20943 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
20944 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
20945 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
20946 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
20947 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
20948 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
20949 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…
Dstm32u5g9xx.h21876 #define RCC_PLL3DIVR_PLL3R_Pos (24U) macro
21877 #define RCC_PLL3DIVR_PLL3R_Msk (0x7FUL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x7F000000…
21879 #define RCC_PLL3DIVR_PLL3R_0 (0x001UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x01000000…
21880 #define RCC_PLL3DIVR_PLL3R_1 (0x002UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x02000000…
21881 #define RCC_PLL3DIVR_PLL3R_2 (0x004UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x04000000…
21882 #define RCC_PLL3DIVR_PLL3R_3 (0x008UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x08000000…
21883 #define RCC_PLL3DIVR_PLL3R_4 (0x010UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x10000000…
21884 #define RCC_PLL3DIVR_PLL3R_5 (0x020UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x20000000…
21885 #define RCC_PLL3DIVR_PLL3R_6 (0x040UL << RCC_PLL3DIVR_PLL3R_Pos) /*!< 0x40000000…