Home
last modified time | relevance | path

Searched refs:RCC_PLL3DIVR_PLL3P_Pos (Results 1 – 23 of 23) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_rcc.h4799 RCC_PLL3DIVR_PLL3P_Pos)); in LL_RCC_PLL3_ConfigDomain_SAI()
4920 MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3P, (PLL3P - 1UL) << RCC_PLL3DIVR_PLL3P_Pos); in LL_RCC_PLL3_SetP()
4931 return (uint32_t)((READ_BIT(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3P) >> RCC_PLL3DIVR_PLL3P_Pos) + 1UL); in LL_RCC_PLL3_GetP()
Dstm32u5xx_hal_rcc_ex.h1355 … ((((__PLL3N__) - 1U) & RCC_PLL3DIVR_PLL3N) | ((((__PLL3P__) -1U) << RCC_PLL3DIVR_PLL3P_Pos) &\
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h4998 MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3P, (PLL3P - 1UL) << RCC_PLL3DIVR_PLL3P_Pos); in LL_RCC_PLL3_SetP()
5009 return (uint32_t)((READ_BIT(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3P) >> RCC_PLL3DIVR_PLL3P_Pos) + 1UL); in LL_RCC_PLL3_GetP()
Dstm32h5xx_hal_rcc_ex.h1675 … ((((__PLL3P__) - 1U) << RCC_PLL3DIVR_PLL3P_Pos) & RCC_PLL3DIVR_PLL3P) | \
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc_ex.c1347 …Init->PLL3.PLL3P = (uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_PLL3P) >> RCC_PLL3DIVR_PLL3P_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig()
1718 … RCC_PLL3DIVR_PLL3P) >> RCC_PLL3DIVR_PLL3P_Pos) + \ in HAL_RCCEx_GetPLL3ClockFreq()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc_ex.c2560 …Init->PLL3.PLL3P = (uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_PLL3P) >> RCC_PLL3DIVR_PLL3P_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig()
3104 … RCC_PLL3DIVR_PLL3P_Pos) + \ in HAL_RCCEx_GetPLL3ClockFreq()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h12869 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
12870 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
12872 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
12873 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
12874 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
12875 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
12876 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
12877 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
12878 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…
Dstm32h562xx.h13549 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
13550 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
13552 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
13553 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
13554 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
13555 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
13556 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
13557 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
13558 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…
Dstm32h533xx.h13388 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
13389 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
13391 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
13392 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
13393 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
13394 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
13395 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
13396 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
13397 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…
Dstm32h573xx.h16152 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
16153 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
16155 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
16156 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
16157 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
16158 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
16159 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
16160 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
16161 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…
Dstm32h563xx.h15633 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
15634 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
15636 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
15637 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
15638 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
15639 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
15640 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
15641 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
15642 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h14709 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
14710 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
14712 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
14713 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
14714 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
14715 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
14716 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
14717 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
14718 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…
Dstm32u535xx.h14196 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
14197 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
14199 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
14200 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
14201 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
14202 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
14203 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
14204 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
14205 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…
Dstm32u575xx.h15604 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
15605 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
15607 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
15608 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
15609 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
15610 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
15611 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
15612 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
15613 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…
Dstm32u585xx.h16166 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
16167 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
16169 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
16170 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
16171 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
16172 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
16173 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
16174 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
16175 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…
Dstm32u595xx.h16632 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
16633 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
16635 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
16636 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
16637 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
16638 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
16639 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
16640 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
16641 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…
Dstm32u5a5xx.h17194 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
17195 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
17197 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
17198 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
17199 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
17200 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
17201 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
17202 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
17203 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…
Dstm32u5f7xx.h18165 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
18166 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
18168 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
18169 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
18170 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
18171 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
18172 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
18173 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
18174 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…
Dstm32u599xx.h20358 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
20359 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
20361 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
20362 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
20363 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
20364 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
20365 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
20366 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
20367 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…
Dstm32u5g7xx.h18727 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
18728 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
18730 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
18731 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
18732 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
18733 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
18734 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
18735 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
18736 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…
Dstm32u5f9xx.h21294 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
21295 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
21297 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
21298 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
21299 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
21300 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
21301 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
21302 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
21303 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…
Dstm32u5a9xx.h20920 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
20921 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
20923 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
20924 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
20925 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
20926 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
20927 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
20928 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
20929 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…
Dstm32u5g9xx.h21856 #define RCC_PLL3DIVR_PLL3P_Pos (9U) macro
21857 #define RCC_PLL3DIVR_PLL3P_Msk (0x7FUL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x0000FE00…
21859 #define RCC_PLL3DIVR_PLL3P_0 (0x001UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000200…
21860 #define RCC_PLL3DIVR_PLL3P_1 (0x002UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000400…
21861 #define RCC_PLL3DIVR_PLL3P_2 (0x004UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00000800…
21862 #define RCC_PLL3DIVR_PLL3P_3 (0x008UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00001000…
21863 #define RCC_PLL3DIVR_PLL3P_4 (0x010UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00002000…
21864 #define RCC_PLL3DIVR_PLL3P_5 (0x020UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00004000…
21865 #define RCC_PLL3DIVR_PLL3P_6 (0x040UL << RCC_PLL3DIVR_PLL3P_Pos) /*!< 0x00008000…