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Searched refs:RCC_PLL3CFGR_PLL3PEN (Results 1 – 23 of 23) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h5083 SET_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN); in LL_RCC_PLL3P_Enable()
5095 CLEAR_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN); in LL_RCC_PLL3P_Disable()
5149 return ((READ_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN) == RCC_PLL3CFGR_PLL3PEN) ? 1UL : 0UL); in LL_RCC_PLL3P_IsEnabled()
Dstm32h5xx_hal_rcc_ex.h564 #define RCC_PLL3_DIVP RCC_PLL3CFGR_PLL3PEN
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_rcc.h5006 SET_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN); in LL_RCC_PLL3_EnableDomain_SAI()
5018 CLEAR_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN); in LL_RCC_PLL3_DisableDomain_SAI()
5028 return ((READ_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN) == (RCC_PLL3CFGR_PLL3PEN)) ? 1UL : 0UL); in LL_RCC_PLL3_IsEnabledDomain_SAI()
Dstm32u5xx_hal_rcc_ex.h541 #define RCC_PLL3_DIVP RCC_PLL3CFGR_PLL3PEN
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc_ex.c3311 …CLEAR_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN | RCC_PLL3CFGR_PLL3QEN | RCC_PLL3CFGR_PLL3REN | RCC_… in HAL_RCCEx_DisablePLL3()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc_ex.c5522 …CLEAR_BIT(RCC->PLL3CFGR, RCC_PLL3CFGR_PLL3PEN | RCC_PLL3CFGR_PLL3QEN | RCC_PLL3CFGR_PLL3REN | RCC_… in HAL_RCCEx_DisablePLL3()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h12724 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk macro
Dstm32h562xx.h13404 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk macro
Dstm32h533xx.h13243 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk macro
Dstm32h573xx.h16007 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk macro
Dstm32h563xx.h15488 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h14564 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk /*!< PLL3 DIVP … macro
Dstm32u535xx.h14051 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk /*!< PLL3 DIVP … macro
Dstm32u575xx.h15459 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk /*!< PLL3 DIVP … macro
Dstm32u585xx.h16021 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk /*!< PLL3 DIVP … macro
Dstm32u595xx.h16487 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk /*!< PLL3 DIVP … macro
Dstm32u5a5xx.h17049 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk /*!< PLL3 DIVP … macro
Dstm32u5f7xx.h18020 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk /*!< PLL3 DIVP … macro
Dstm32u599xx.h20213 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk /*!< PLL3 DIVP … macro
Dstm32u5g7xx.h18582 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk /*!< PLL3 DIVP … macro
Dstm32u5f9xx.h21149 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk /*!< PLL3 DIVP … macro
Dstm32u5a9xx.h20775 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk /*!< PLL3 DIVP … macro
Dstm32u5g9xx.h21711 #define RCC_PLL3CFGR_PLL3PEN RCC_PLL3CFGR_PLL3PEN_Msk /*!< PLL3 DIVP … macro