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Searched refs:RCC_PLL2DIVR_PLL2R_Pos (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h8651 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
8652 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
8654 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
8655 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
8656 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
8657 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
8658 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
8659 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
8660 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
Dstm32h523xx.h12827 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
12828 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
12830 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
12831 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
12832 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
12833 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
12834 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
12835 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
12836 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
Dstm32h562xx.h13507 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
13508 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
13510 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
13511 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
13512 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
13513 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
13514 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
13515 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
13516 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
Dstm32h533xx.h13346 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
13347 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
13349 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
13350 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
13351 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
13352 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
13353 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
13354 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
13355 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
Dstm32h573xx.h16110 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
16111 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
16113 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
16114 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
16115 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
16116 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
16117 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
16118 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
16119 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
Dstm32h563xx.h15591 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
15592 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
15594 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
15595 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
15596 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
15597 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
15598 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
15599 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
15600 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h4711 MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2R, (PLL2R - 1UL) << RCC_PLL2DIVR_PLL2R_Pos); in LL_RCC_PLL2_SetR()
4722 return (uint32_t)((READ_BIT(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2R) >> RCC_PLL2DIVR_PLL2R_Pos) + 1UL); in LL_RCC_PLL2_GetR()
Dstm32h5xx_hal_rcc_ex.h1448 … ((((__PLL2R__) - 1U) << RCC_PLL2DIVR_PLL2R_Pos) & RCC_PLL2DIVR_PLL2R))); \
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_rcc.h4437 RCC_PLL2DIVR_PLL2R_Pos)); in LL_RCC_PLL2_ConfigDomain_ADC()
4543 MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2R, (PLL2R - 1UL) << RCC_PLL2DIVR_PLL2R_Pos); in LL_RCC_PLL2_SetR()
Dstm32u5xx_hal_rcc_ex.h1228 … RCC_PLL2DIVR_PLL2R_Pos) & \
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc_ex.c1338 …Init->PLL2.PLL2R = (uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_PLL2R) >> RCC_PLL2DIVR_PLL2R_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig()
1648 … RCC_PLL2DIVR_PLL2R) >> RCC_PLL2DIVR_PLL2R_Pos) + \ in HAL_RCCEx_GetPLL2ClockFreq()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc_ex.c2550 …Init->PLL2.PLL2R = (uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_PLL2R) >> RCC_PLL2DIVR_PLL2R_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig()
3012 … RCC_PLL2DIVR_PLL2R_Pos) + \ in HAL_RCCEx_GetPLL2ClockFreq()
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h14667 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
14668 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
14670 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
14671 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
14672 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
14673 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
14674 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
14675 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
14676 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
Dstm32u535xx.h14154 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
14155 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
14157 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
14158 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
14159 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
14160 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
14161 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
14162 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
14163 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
Dstm32u575xx.h15562 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
15563 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
15565 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
15566 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
15567 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
15568 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
15569 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
15570 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
15571 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
Dstm32u585xx.h16124 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
16125 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
16127 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
16128 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
16129 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
16130 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
16131 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
16132 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
16133 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
Dstm32u595xx.h16590 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
16591 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
16593 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
16594 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
16595 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
16596 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
16597 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
16598 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
16599 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
Dstm32u5a5xx.h17152 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
17153 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
17155 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
17156 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
17157 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
17158 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
17159 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
17160 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
17161 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
Dstm32u5f7xx.h18123 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
18124 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
18126 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
18127 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
18128 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
18129 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
18130 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
18131 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
18132 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
Dstm32u599xx.h20316 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
20317 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
20319 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
20320 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
20321 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
20322 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
20323 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
20324 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
20325 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
Dstm32u5g7xx.h18685 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
18686 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
18688 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
18689 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
18690 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
18691 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
18692 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
18693 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
18694 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
Dstm32u5f9xx.h21252 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
21253 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
21255 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
21256 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
21257 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
21258 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
21259 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
21260 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
21261 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
Dstm32u5a9xx.h20878 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
20879 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
20881 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
20882 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
20883 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
20884 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
20885 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
20886 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
20887 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…
Dstm32u5g9xx.h21814 #define RCC_PLL2DIVR_PLL2R_Pos (24U) macro
21815 #define RCC_PLL2DIVR_PLL2R_Msk (0x7FUL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x7F000000…
21817 #define RCC_PLL2DIVR_PLL2R_0 (0x001UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x01000000…
21818 #define RCC_PLL2DIVR_PLL2R_1 (0x002UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x02000000…
21819 #define RCC_PLL2DIVR_PLL2R_2 (0x004UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x04000000…
21820 #define RCC_PLL2DIVR_PLL2R_3 (0x008UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x08000000…
21821 #define RCC_PLL2DIVR_PLL2R_4 (0x010UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x10000000…
21822 #define RCC_PLL2DIVR_PLL2R_5 (0x020UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x20000000…
21823 #define RCC_PLL2DIVR_PLL2R_6 (0x040UL << RCC_PLL2DIVR_PLL2R_Pos) /*!< 0x40000000…