/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
D | stm32u5xx_ll_rcc.h | 4383 RCC_PLL2DIVR_PLL2Q_Pos)); in LL_RCC_PLL2_ConfigDomain_48M() 4521 MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2Q, (PLL2Q - 1UL) << RCC_PLL2DIVR_PLL2Q_Pos); in LL_RCC_PLL2_SetQ() 4532 return (uint32_t)((READ_BIT(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2Q) >> RCC_PLL2DIVR_PLL2Q_Pos) + 1UL); in LL_RCC_PLL2_GetQ() 4554 return (uint32_t)((READ_BIT(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2Q) >> RCC_PLL2DIVR_PLL2Q_Pos) + 1UL); in LL_RCC_PLL2_GetR()
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D | stm32u5xx_hal_rcc_ex.h | 1226 … ((((__PLL2Q__) -1U) << RCC_PLL2DIVR_PLL2Q_Pos)& \
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/hal_stm32-latest/stm32cube/stm32h5xx/soc/ |
D | stm32h503xx.h | 8641 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 8642 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 8644 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 8645 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 8646 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 8647 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 8648 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 8649 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 8650 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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D | stm32h523xx.h | 12817 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 12818 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 12820 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 12821 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 12822 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 12823 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 12824 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 12825 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 12826 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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D | stm32h562xx.h | 13497 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 13498 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 13500 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 13501 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 13502 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 13503 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 13504 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 13505 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 13506 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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D | stm32h533xx.h | 13336 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 13337 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 13339 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 13340 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 13341 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 13342 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 13343 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 13344 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 13345 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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D | stm32h573xx.h | 16100 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 16101 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 16103 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 16104 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 16105 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 16106 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 16107 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 16108 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 16109 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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D | stm32h563xx.h | 15581 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 15582 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 15584 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 15585 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 15586 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 15587 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 15588 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 15589 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 15590 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
D | stm32h5xx_ll_rcc.h | 4689 MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2Q, (PLL2Q - 1UL) << RCC_PLL2DIVR_PLL2Q_Pos); in LL_RCC_PLL2_SetQ() 4700 return (uint32_t)((READ_BIT(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2Q) >> RCC_PLL2DIVR_PLL2Q_Pos) + 1UL); in LL_RCC_PLL2_GetQ()
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D | stm32h5xx_hal_rcc_ex.h | 1447 … ((((__PLL2Q__) - 1U) << RCC_PLL2DIVR_PLL2Q_Pos) & RCC_PLL2DIVR_PLL2Q) | \
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/ |
D | stm32u5xx_hal_rcc_ex.c | 1337 …Init->PLL2.PLL2Q = (uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_PLL2Q) >> RCC_PLL2DIVR_PLL2Q_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig() 1638 … RCC_PLL2DIVR_PLL2Q) >> RCC_PLL2DIVR_PLL2Q_Pos) + \ in HAL_RCCEx_GetPLL2ClockFreq()
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/ |
D | stm32h5xx_hal_rcc_ex.c | 2549 …Init->PLL2.PLL2Q = (uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_PLL2Q) >> RCC_PLL2DIVR_PLL2Q_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig() 2991 … RCC_PLL2DIVR_PLL2Q_Pos) + \ in HAL_RCCEx_GetPLL2ClockFreq()
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/hal_stm32-latest/stm32cube/stm32u5xx/soc/ |
D | stm32u545xx.h | 14657 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 14658 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 14660 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 14661 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 14662 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 14663 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 14664 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 14665 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 14666 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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D | stm32u535xx.h | 14144 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 14145 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 14147 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 14148 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 14149 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 14150 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 14151 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 14152 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 14153 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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D | stm32u575xx.h | 15552 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 15553 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 15555 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 15556 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 15557 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 15558 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 15559 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 15560 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 15561 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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D | stm32u585xx.h | 16114 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 16115 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 16117 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 16118 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 16119 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 16120 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 16121 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 16122 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 16123 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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D | stm32u595xx.h | 16580 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 16581 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 16583 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 16584 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 16585 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 16586 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 16587 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 16588 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 16589 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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D | stm32u5a5xx.h | 17142 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 17143 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 17145 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 17146 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 17147 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 17148 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 17149 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 17150 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 17151 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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D | stm32u5f7xx.h | 18113 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 18114 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 18116 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 18117 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 18118 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 18119 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 18120 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 18121 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 18122 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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D | stm32u599xx.h | 20306 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 20307 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 20309 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 20310 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 20311 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 20312 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 20313 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 20314 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 20315 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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D | stm32u5g7xx.h | 18675 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 18676 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 18678 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 18679 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 18680 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 18681 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 18682 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 18683 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 18684 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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D | stm32u5f9xx.h | 21242 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 21243 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 21245 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 21246 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 21247 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 21248 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 21249 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 21250 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 21251 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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D | stm32u5a9xx.h | 20868 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 20869 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 20871 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 20872 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 20873 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 20874 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 20875 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 20876 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 20877 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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D | stm32u5g9xx.h | 21804 #define RCC_PLL2DIVR_PLL2Q_Pos (16U) macro 21805 #define RCC_PLL2DIVR_PLL2Q_Msk (0x7FUL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x007F0000… 21807 #define RCC_PLL2DIVR_PLL2Q_0 (0x001UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00010000… 21808 #define RCC_PLL2DIVR_PLL2Q_1 (0x002UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00020000… 21809 #define RCC_PLL2DIVR_PLL2Q_2 (0x004UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00040000… 21810 #define RCC_PLL2DIVR_PLL2Q_3 (0x008UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00080000… 21811 #define RCC_PLL2DIVR_PLL2Q_4 (0x010UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00100000… 21812 #define RCC_PLL2DIVR_PLL2Q_5 (0x020UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00200020… 21813 #define RCC_PLL2DIVR_PLL2Q_6 (0x040UL << RCC_PLL2DIVR_PLL2Q_Pos) /*!< 0x00400000…
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