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Searched refs:RCC_PLL2DIVR_PLL2P_Pos (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_rcc.h4410 RCC_PLL2DIVR_PLL2P_Pos)); in LL_RCC_PLL2_ConfigDomain_SAI()
4498 MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2P, (PLL2P - 1UL) << RCC_PLL2DIVR_PLL2P_Pos); in LL_RCC_PLL2_SetP()
4509 return (uint32_t)((READ_BIT(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2P) >> RCC_PLL2DIVR_PLL2P_Pos) + 1UL); in LL_RCC_PLL2_GetP()
Dstm32u5xx_hal_rcc_ex.h1225 … RCC_PLL2DIVR_PLL2P_Pos) & RCC_PLL2DIVR_PLL2P) |\
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h8631 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
8632 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
8634 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
8635 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
8636 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
8637 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
8638 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
8639 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
8640 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
Dstm32h523xx.h12807 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
12808 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
12810 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
12811 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
12812 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
12813 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
12814 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
12815 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
12816 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
Dstm32h562xx.h13487 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
13488 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
13490 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
13491 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
13492 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
13493 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
13494 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
13495 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
13496 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
Dstm32h533xx.h13326 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
13327 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
13329 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
13330 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
13331 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
13332 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
13333 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
13334 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
13335 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
Dstm32h573xx.h16090 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
16091 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
16093 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
16094 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
16095 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
16096 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
16097 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
16098 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
16099 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
Dstm32h563xx.h15571 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
15572 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
15574 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
15575 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
15576 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
15577 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
15578 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
15579 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
15580 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h4666 MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2P, (PLL2P - 1UL) << RCC_PLL2DIVR_PLL2P_Pos); in LL_RCC_PLL2_SetP()
4677 return (uint32_t)((READ_BIT(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2P) >> RCC_PLL2DIVR_PLL2P_Pos) + 1UL); in LL_RCC_PLL2_GetP()
Dstm32h5xx_hal_rcc_ex.h1446 … ((((__PLL2P__) - 1U) << RCC_PLL2DIVR_PLL2P_Pos) & RCC_PLL2DIVR_PLL2P) | \
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc_ex.c1336 …Init->PLL2.PLL2P = (uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_PLL2P) >> RCC_PLL2DIVR_PLL2P_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig()
1628 … RCC_PLL2DIVR_PLL2P) >> RCC_PLL2DIVR_PLL2P_Pos) + \ in HAL_RCCEx_GetPLL2ClockFreq()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc_ex.c2548 …Init->PLL2.PLL2P = (uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_PLL2P) >> RCC_PLL2DIVR_PLL2P_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig()
2970 … RCC_PLL2DIVR_PLL2P_Pos) + \ in HAL_RCCEx_GetPLL2ClockFreq()
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h14647 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
14648 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
14650 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
14651 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
14652 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
14653 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
14654 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
14655 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
14656 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
Dstm32u535xx.h14134 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
14135 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
14137 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
14138 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
14139 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
14140 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
14141 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
14142 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
14143 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
Dstm32u575xx.h15542 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
15543 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
15545 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
15546 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
15547 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
15548 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
15549 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
15550 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
15551 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
Dstm32u585xx.h16104 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
16105 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
16107 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
16108 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
16109 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
16110 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
16111 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
16112 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
16113 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
Dstm32u595xx.h16570 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
16571 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
16573 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
16574 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
16575 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
16576 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
16577 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
16578 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
16579 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
Dstm32u5a5xx.h17132 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
17133 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
17135 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
17136 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
17137 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
17138 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
17139 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
17140 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
17141 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
Dstm32u5f7xx.h18103 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
18104 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
18106 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
18107 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
18108 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
18109 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
18110 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
18111 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
18112 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
Dstm32u599xx.h20296 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
20297 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
20299 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
20300 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
20301 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
20302 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
20303 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
20304 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
20305 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
Dstm32u5g7xx.h18665 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
18666 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
18668 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
18669 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
18670 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
18671 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
18672 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
18673 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
18674 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
Dstm32u5f9xx.h21232 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
21233 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
21235 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
21236 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
21237 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
21238 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
21239 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
21240 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
21241 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
Dstm32u5a9xx.h20858 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
20859 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
20861 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
20862 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
20863 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
20864 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
20865 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
20866 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
20867 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…
Dstm32u5g9xx.h21794 #define RCC_PLL2DIVR_PLL2P_Pos (9U) macro
21795 #define RCC_PLL2DIVR_PLL2P_Msk (0x7FUL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x0000FE00…
21797 #define RCC_PLL2DIVR_PLL2P_0 (0x001UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000200…
21798 #define RCC_PLL2DIVR_PLL2P_1 (0x002UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000400…
21799 #define RCC_PLL2DIVR_PLL2P_2 (0x004UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00000800…
21800 #define RCC_PLL2DIVR_PLL2P_3 (0x008UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00001000…
21801 #define RCC_PLL2DIVR_PLL2P_4 (0x010UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00002000…
21802 #define RCC_PLL2DIVR_PLL2P_5 (0x020UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00004000…
21803 #define RCC_PLL2DIVR_PLL2P_6 (0x040UL << RCC_PLL2DIVR_PLL2P_Pos) /*!< 0x00008000…