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Searched refs:RCC_PLL2DIVR_PLL2N_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_rcc.h4382 … RCC_PLL2DIVR_PLL2N_Pos) | ((PLLQ - 1UL) << \ in LL_RCC_PLL2_ConfigDomain_48M()
4409 … RCC_PLL2DIVR_PLL2N_Pos) | ((PLLP - 1UL) << \ in LL_RCC_PLL2_ConfigDomain_SAI()
4436 … RCC_PLL2DIVR_PLL2N_Pos) | ((PLLR - 1UL) << \ in LL_RCC_PLL2_ConfigDomain_ADC()
4476 MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2N, (PLL2N - 1UL) << RCC_PLL2DIVR_PLL2N_Pos); in LL_RCC_PLL2_SetN()
4486 return (uint32_t)((READ_BIT(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2N) >> RCC_PLL2DIVR_PLL2N_Pos) + 1UL); in LL_RCC_PLL2_GetN()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h8619 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
8620 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
8622 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
8623 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
8624 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
8625 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
8626 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
8627 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
8628 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
8629 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
Dstm32h523xx.h12795 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
12796 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
12798 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
12799 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
12800 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
12801 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
12802 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
12803 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
12804 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
12805 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
Dstm32h562xx.h13475 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
13476 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
13478 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
13479 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
13480 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
13481 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
13482 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
13483 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
13484 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
13485 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
Dstm32h533xx.h13314 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
13315 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
13317 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
13318 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
13319 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
13320 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
13321 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
13322 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
13323 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
13324 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
Dstm32h573xx.h16078 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
16079 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
16081 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
16082 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
16083 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
16084 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
16085 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
16086 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
16087 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
16088 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
Dstm32h563xx.h15559 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
15560 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
15562 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
15563 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
15564 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
15565 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
15566 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
15567 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
15568 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
15569 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h4645 MODIFY_REG(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2N, (PLL2N - 1UL) << RCC_PLL2DIVR_PLL2N_Pos); in LL_RCC_PLL2_SetN()
4655 return (uint32_t)((READ_BIT(RCC->PLL2DIVR, RCC_PLL2DIVR_PLL2N) >> RCC_PLL2DIVR_PLL2N_Pos) + 1UL); in LL_RCC_PLL2_GetN()
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h14635 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
14636 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
14638 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
14639 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
14640 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
14641 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
14642 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
14643 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
14644 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
14645 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
Dstm32u535xx.h14122 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
14123 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
14125 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
14126 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
14127 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
14128 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
14129 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
14130 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
14131 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
14132 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
Dstm32u575xx.h15530 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
15531 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
15533 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
15534 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
15535 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
15536 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
15537 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
15538 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
15539 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
15540 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
Dstm32u585xx.h16092 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
16093 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
16095 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
16096 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
16097 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
16098 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
16099 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
16100 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
16101 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
16102 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
Dstm32u595xx.h16558 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
16559 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
16561 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
16562 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
16563 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
16564 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
16565 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
16566 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
16567 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
16568 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
Dstm32u5a5xx.h17120 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
17121 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
17123 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
17124 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
17125 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
17126 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
17127 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
17128 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
17129 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
17130 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
Dstm32u5f7xx.h18091 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
18092 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
18094 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
18095 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
18096 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
18097 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
18098 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
18099 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
18100 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
18101 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
Dstm32u599xx.h20284 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
20285 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
20287 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
20288 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
20289 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
20290 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
20291 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
20292 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
20293 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
20294 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
Dstm32u5g7xx.h18653 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
18654 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
18656 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
18657 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
18658 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
18659 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
18660 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
18661 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
18662 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
18663 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
Dstm32u5f9xx.h21220 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
21221 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
21223 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
21224 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
21225 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
21226 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
21227 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
21228 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
21229 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
21230 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
Dstm32u5a9xx.h20846 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
20847 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
20849 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
20850 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
20851 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
20852 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
20853 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
20854 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
20855 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
20856 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
[all …]
Dstm32u5g9xx.h21782 #define RCC_PLL2DIVR_PLL2N_Pos (0U) macro
21783 #define RCC_PLL2DIVR_PLL2N_Msk (0x1FFUL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x000001FF…
21785 #define RCC_PLL2DIVR_PLL2N_0 (0x001UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000001…
21786 #define RCC_PLL2DIVR_PLL2N_1 (0x002UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000002…
21787 #define RCC_PLL2DIVR_PLL2N_2 (0x004UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000004…
21788 #define RCC_PLL2DIVR_PLL2N_3 (0x008UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000008…
21789 #define RCC_PLL2DIVR_PLL2N_4 (0x010UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000010…
21790 #define RCC_PLL2DIVR_PLL2N_5 (0x020UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000020…
21791 #define RCC_PLL2DIVR_PLL2N_6 (0x040UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000040…
21792 #define RCC_PLL2DIVR_PLL2N_7 (0x080UL << RCC_PLL2DIVR_PLL2N_Pos) /*!< 0x00000080…
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc_ex.c1335 …Init->PLL2.PLL2N = (uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_PLL2N) >> RCC_PLL2DIVR_PLL2N_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc_ex.c2547 …Init->PLL2.PLL2N = (uint32_t)((RCC->PLL2DIVR & RCC_PLL2DIVR_PLL2N) >> RCC_PLL2DIVR_PLL2N_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig()