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Searched refs:RCC_PLL2CFGR_PLL2M_Pos (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_rcc.h4380 ((PLLM - 1UL) << RCC_PLL2CFGR_PLL2M_Pos)); in LL_RCC_PLL2_ConfigDomain_48M()
4407 ((PLLM - 1UL) << RCC_PLL2CFGR_PLL2M_Pos)); in LL_RCC_PLL2_ConfigDomain_SAI()
4434 ((PLLM - 1UL) << RCC_PLL2CFGR_PLL2M_Pos)); in LL_RCC_PLL2_ConfigDomain_ADC()
4564 MODIFY_REG(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2M, (PLL2M - 1UL) << RCC_PLL2CFGR_PLL2M_Pos); in LL_RCC_PLL2_SetDivider()
4574 return (uint32_t)((READ_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2M) >> RCC_PLL2CFGR_PLL2M_Pos) + 1UL); in LL_RCC_PLL2_GetDivider()
Dstm32u5xx_hal_rcc_ex.h1222 (((__PLL2M__) - 1U) << RCC_PLL2CFGR_PLL2M_Pos));\
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h4625 MODIFY_REG(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2M, PLL2M << RCC_PLL2CFGR_PLL2M_Pos); in LL_RCC_PLL2_SetM()
4635 return (uint32_t)(READ_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2M) >> RCC_PLL2CFGR_PLL2M_Pos); in LL_RCC_PLL2_GetM()
Dstm32h5xx_hal_rcc_ex.h1444 … ((__PLL2SOURCE__) << RCC_PLL2CFGR_PLL2SRC_Pos) | ((__PLL2M__) << RCC_PLL2CFGR_PLL2M_Pos)); \
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc_ex.c1334 …Init->PLL2.PLL2M = (uint32_t)((RCC->PLL2CFGR & RCC_PLL2CFGR_PLL2M) >> RCC_PLL2CFGR_PLL2M_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig()
1598 pll2m = ((RCC->PLL2CFGR & RCC_PLL2CFGR_PLL2M) >> RCC_PLL2CFGR_PLL2M_Pos) + 1U; in HAL_RCCEx_GetPLL2ClockFreq()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h8537 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
8538 #define RCC_PLL2CFGR_PLL2M_Msk (0x3FUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00003F00…
8540 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
8541 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
8542 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
8543 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
8544 #define RCC_PLL2CFGR_PLL2M_4 (0x10UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00001000…
8545 #define RCC_PLL2CFGR_PLL2M_5 (0x20UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00002000…
Dstm32h523xx.h12677 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
12678 #define RCC_PLL2CFGR_PLL2M_Msk (0x3FUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00003F00…
12680 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
12681 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
12682 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
12683 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
12684 #define RCC_PLL2CFGR_PLL2M_4 (0x10UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00001000…
12685 #define RCC_PLL2CFGR_PLL2M_5 (0x20UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00002000…
Dstm32h562xx.h13357 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
13358 #define RCC_PLL2CFGR_PLL2M_Msk (0x3FUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00003F00…
13360 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
13361 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
13362 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
13363 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
13364 #define RCC_PLL2CFGR_PLL2M_4 (0x10UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00001000…
13365 #define RCC_PLL2CFGR_PLL2M_5 (0x20UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00002000…
Dstm32h533xx.h13196 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
13197 #define RCC_PLL2CFGR_PLL2M_Msk (0x3FUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00003F00…
13199 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
13200 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
13201 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
13202 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
13203 #define RCC_PLL2CFGR_PLL2M_4 (0x10UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00001000…
13204 #define RCC_PLL2CFGR_PLL2M_5 (0x20UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00002000…
Dstm32h573xx.h15960 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
15961 #define RCC_PLL2CFGR_PLL2M_Msk (0x3FUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00003F00…
15963 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
15964 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
15965 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
15966 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
15967 #define RCC_PLL2CFGR_PLL2M_4 (0x10UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00001000…
15968 #define RCC_PLL2CFGR_PLL2M_5 (0x20UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00002000…
Dstm32h563xx.h15441 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
15442 #define RCC_PLL2CFGR_PLL2M_Msk (0x3FUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00003F00…
15444 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
15445 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
15446 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
15447 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
15448 #define RCC_PLL2CFGR_PLL2M_4 (0x10UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00001000…
15449 #define RCC_PLL2CFGR_PLL2M_5 (0x20UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00002000…
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc_ex.c2546 …phClkInit->PLL2.PLL2M = (uint32_t)((RCC->PLL2CFGR & RCC_PLL2CFGR_PLL2M) >> RCC_PLL2CFGR_PLL2M_Pos); in HAL_RCCEx_GetPeriphCLKConfig()
2930 pll2m = ((RCC->PLL2CFGR & RCC_PLL2CFGR_PLL2M) >> RCC_PLL2CFGR_PLL2M_Pos); in HAL_RCCEx_GetPLL2ClockFreq()
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h14524 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
14525 #define RCC_PLL2CFGR_PLL2M_Msk (0xFUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x000003F0…
14527 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
14528 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
14529 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
14530 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
Dstm32u535xx.h14011 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
14012 #define RCC_PLL2CFGR_PLL2M_Msk (0xFUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x000003F0…
14014 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
14015 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
14016 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
14017 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
Dstm32u575xx.h15419 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
15420 #define RCC_PLL2CFGR_PLL2M_Msk (0xFUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x000003F0…
15422 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
15423 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
15424 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
15425 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
Dstm32u585xx.h15981 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
15982 #define RCC_PLL2CFGR_PLL2M_Msk (0xFUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x000003F0…
15984 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
15985 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
15986 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
15987 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
Dstm32u595xx.h16447 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
16448 #define RCC_PLL2CFGR_PLL2M_Msk (0xFUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x000003F0…
16450 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
16451 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
16452 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
16453 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
Dstm32u5a5xx.h17009 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
17010 #define RCC_PLL2CFGR_PLL2M_Msk (0xFUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x000003F0…
17012 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
17013 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
17014 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
17015 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
Dstm32u5f7xx.h17980 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
17981 #define RCC_PLL2CFGR_PLL2M_Msk (0xFUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x000003F0…
17983 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
17984 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
17985 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
17986 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
Dstm32u599xx.h20173 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
20174 #define RCC_PLL2CFGR_PLL2M_Msk (0xFUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x000003F0…
20176 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
20177 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
20178 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
20179 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
Dstm32u5g7xx.h18542 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
18543 #define RCC_PLL2CFGR_PLL2M_Msk (0xFUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x000003F0…
18545 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
18546 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
18547 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
18548 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
Dstm32u5f9xx.h21109 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
21110 #define RCC_PLL2CFGR_PLL2M_Msk (0xFUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x000003F0…
21112 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
21113 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
21114 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
21115 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
Dstm32u5a9xx.h20735 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
20736 #define RCC_PLL2CFGR_PLL2M_Msk (0xFUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x000003F0…
20738 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
20739 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
20740 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
20741 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…
Dstm32u5g9xx.h21671 #define RCC_PLL2CFGR_PLL2M_Pos (8U) macro
21672 #define RCC_PLL2CFGR_PLL2M_Msk (0xFUL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x000003F0…
21674 #define RCC_PLL2CFGR_PLL2M_0 (0x01UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000100…
21675 #define RCC_PLL2CFGR_PLL2M_1 (0x02UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000200…
21676 #define RCC_PLL2CFGR_PLL2M_2 (0x04UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000400…
21677 #define RCC_PLL2CFGR_PLL2M_3 (0x08UL << RCC_PLL2CFGR_PLL2M_Pos) /*!< 0x00000800…