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Searched refs:RCC_IOPENR_GPIOCEN (Results 1 – 25 of 45) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_rcc.h734 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN);\
736 tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN);\
751 #define __HAL_RCC_GPIOC_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN)
819 #define __HAL_RCC_GPIOC_IS_CLK_ENABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN) != 0U)
823 #define __HAL_RCC_GPIOC_IS_CLK_DISABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN) == 0U)
Dstm32l0xx_ll_bus.h174 #define LL_IOP_GRP1_PERIPH_GPIOC RCC_IOPENR_GPIOCEN /*!< GPIO port C control */
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h755 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN); \
757 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN); \
779 #define __HAL_RCC_GPIOC_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN)
1037 #define __HAL_RCC_GPIOC_IS_CLK_ENABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN) != 0U)
1045 #define __HAL_RCC_GPIOC_IS_CLK_DISABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN) == 0U)
Dstm32c0xx_ll_bus.h148 #define LL_IOP_GRP1_PERIPH_GPIOC RCC_IOPENR_GPIOCEN
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h957 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN); \
959 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN); \
991 #define __HAL_RCC_GPIOC_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN)
1501 #define __HAL_RCC_GPIOC_IS_CLK_ENABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN) != RESET)
1511 #define __HAL_RCC_GPIOC_IS_CLK_DISABLED() (READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN) == RESET)
Dstm32g0xx_ll_bus.h208 #define LL_IOP_GRP1_PERIPH_GPIOC RCC_IOPENR_GPIOCEN
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_bus.h164 #define LL_IOP_GRP1_PERIPH_GPIOC RCC_IOPENR_GPIOCEN
Dstm32u0xx_hal_rcc.h802 SET_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN); \
804 … tmpreg = READ_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN); \
836 #define __HAL_RCC_GPIOC_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOCEN)
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h3744 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_IOPCEN /*!< GPIO port C clock enable … macro
Dstm32l010x8.h3448 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_IOPCEN /*!< GPIO port C clock enable … macro
Dstm32l010xb.h3466 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_IOPCEN /*!< GPIO port C clock enable … macro
Dstm32l011xx.h3523 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_IOPCEN /*!< GPIO port C clock enable … macro
Dstm32l021xx.h3654 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_IOPCEN /*!< GPIO port C clock enable … macro
Dstm32l031xx.h3613 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_IOPCEN /*!< GPIO port C clock enable … macro
Dstm32l051xx.h3704 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_IOPCEN /*!< GPIO port C clock enable … macro
Dstm32l010x4.h3414 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_IOPCEN /*!< GPIO port C clock enable … macro
Dstm32l010x6.h3442 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_IOPCEN /*!< GPIO port C clock enable … macro
Dstm32l081xx.h3909 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_IOPCEN /*!< GPIO port C clock enable … macro
Dstm32l071xx.h3778 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_IOPCEN /*!< GPIO port C clock enable … macro
Dstm32l052xx.h4029 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_IOPCEN /*!< GPIO port C clock enable … macro
Dstm32l062xx.h4160 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_IOPCEN /*!< GPIO port C clock enable … macro
Dstm32l053xx.h4176 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_IOPCEN /*!< GPIO port C clock enable … macro
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h4068 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_GPIOCEN_Msk macro
Dstm32c031xx.h4225 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_GPIOCEN_Msk macro
Dstm32c071xx.h4678 #define RCC_IOPENR_GPIOCEN RCC_IOPENR_GPIOCEN_Msk macro

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