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Searched refs:RCC_ICSCR1_MSICAL3_Pos (Results 1 – 12 of 12) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h14247 #define RCC_ICSCR1_MSICAL3_Pos (0U) macro
14248 #define RCC_ICSCR1_MSICAL3_Msk (0x1FUL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x0000001F…
14250 #define RCC_ICSCR1_MSICAL3_0 (0x01UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000001…
14251 #define RCC_ICSCR1_MSICAL3_1 (0x02UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000002…
14252 #define RCC_ICSCR1_MSICAL3_2 (0x04UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000004…
14253 #define RCC_ICSCR1_MSICAL3_3 (0x08UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000008…
14254 #define RCC_ICSCR1_MSICAL3_4 (0x10UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000010…
Dstm32u535xx.h13734 #define RCC_ICSCR1_MSICAL3_Pos (0U) macro
13735 #define RCC_ICSCR1_MSICAL3_Msk (0x1FUL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x0000001F…
13737 #define RCC_ICSCR1_MSICAL3_0 (0x01UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000001…
13738 #define RCC_ICSCR1_MSICAL3_1 (0x02UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000002…
13739 #define RCC_ICSCR1_MSICAL3_2 (0x04UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000004…
13740 #define RCC_ICSCR1_MSICAL3_3 (0x08UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000008…
13741 #define RCC_ICSCR1_MSICAL3_4 (0x10UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000010…
Dstm32u575xx.h15142 #define RCC_ICSCR1_MSICAL3_Pos (0U) macro
15143 #define RCC_ICSCR1_MSICAL3_Msk (0x1FUL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x0000001F…
15145 #define RCC_ICSCR1_MSICAL3_0 (0x01UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000001…
15146 #define RCC_ICSCR1_MSICAL3_1 (0x02UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000002…
15147 #define RCC_ICSCR1_MSICAL3_2 (0x04UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000004…
15148 #define RCC_ICSCR1_MSICAL3_3 (0x08UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000008…
15149 #define RCC_ICSCR1_MSICAL3_4 (0x10UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000010…
Dstm32u585xx.h15704 #define RCC_ICSCR1_MSICAL3_Pos (0U) macro
15705 #define RCC_ICSCR1_MSICAL3_Msk (0x1FUL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x0000001F…
15707 #define RCC_ICSCR1_MSICAL3_0 (0x01UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000001…
15708 #define RCC_ICSCR1_MSICAL3_1 (0x02UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000002…
15709 #define RCC_ICSCR1_MSICAL3_2 (0x04UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000004…
15710 #define RCC_ICSCR1_MSICAL3_3 (0x08UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000008…
15711 #define RCC_ICSCR1_MSICAL3_4 (0x10UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000010…
Dstm32u595xx.h16170 #define RCC_ICSCR1_MSICAL3_Pos (0U) macro
16171 #define RCC_ICSCR1_MSICAL3_Msk (0x1FUL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x0000001F…
16173 #define RCC_ICSCR1_MSICAL3_0 (0x01UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000001…
16174 #define RCC_ICSCR1_MSICAL3_1 (0x02UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000002…
16175 #define RCC_ICSCR1_MSICAL3_2 (0x04UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000004…
16176 #define RCC_ICSCR1_MSICAL3_3 (0x08UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000008…
16177 #define RCC_ICSCR1_MSICAL3_4 (0x10UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000010…
Dstm32u5a5xx.h16732 #define RCC_ICSCR1_MSICAL3_Pos (0U) macro
16733 #define RCC_ICSCR1_MSICAL3_Msk (0x1FUL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x0000001F…
16735 #define RCC_ICSCR1_MSICAL3_0 (0x01UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000001…
16736 #define RCC_ICSCR1_MSICAL3_1 (0x02UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000002…
16737 #define RCC_ICSCR1_MSICAL3_2 (0x04UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000004…
16738 #define RCC_ICSCR1_MSICAL3_3 (0x08UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000008…
16739 #define RCC_ICSCR1_MSICAL3_4 (0x10UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000010…
Dstm32u5f7xx.h17696 #define RCC_ICSCR1_MSICAL3_Pos (0U) macro
17697 #define RCC_ICSCR1_MSICAL3_Msk (0x1FUL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x0000001F…
17699 #define RCC_ICSCR1_MSICAL3_0 (0x01UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000001…
17700 #define RCC_ICSCR1_MSICAL3_1 (0x02UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000002…
17701 #define RCC_ICSCR1_MSICAL3_2 (0x04UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000004…
17702 #define RCC_ICSCR1_MSICAL3_3 (0x08UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000008…
17703 #define RCC_ICSCR1_MSICAL3_4 (0x10UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000010…
Dstm32u599xx.h19889 #define RCC_ICSCR1_MSICAL3_Pos (0U) macro
19890 #define RCC_ICSCR1_MSICAL3_Msk (0x1FUL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x0000001F…
19892 #define RCC_ICSCR1_MSICAL3_0 (0x01UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000001…
19893 #define RCC_ICSCR1_MSICAL3_1 (0x02UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000002…
19894 #define RCC_ICSCR1_MSICAL3_2 (0x04UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000004…
19895 #define RCC_ICSCR1_MSICAL3_3 (0x08UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000008…
19896 #define RCC_ICSCR1_MSICAL3_4 (0x10UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000010…
Dstm32u5g7xx.h18258 #define RCC_ICSCR1_MSICAL3_Pos (0U) macro
18259 #define RCC_ICSCR1_MSICAL3_Msk (0x1FUL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x0000001F…
18261 #define RCC_ICSCR1_MSICAL3_0 (0x01UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000001…
18262 #define RCC_ICSCR1_MSICAL3_1 (0x02UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000002…
18263 #define RCC_ICSCR1_MSICAL3_2 (0x04UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000004…
18264 #define RCC_ICSCR1_MSICAL3_3 (0x08UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000008…
18265 #define RCC_ICSCR1_MSICAL3_4 (0x10UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000010…
Dstm32u5f9xx.h20825 #define RCC_ICSCR1_MSICAL3_Pos (0U) macro
20826 #define RCC_ICSCR1_MSICAL3_Msk (0x1FUL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x0000001F…
20828 #define RCC_ICSCR1_MSICAL3_0 (0x01UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000001…
20829 #define RCC_ICSCR1_MSICAL3_1 (0x02UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000002…
20830 #define RCC_ICSCR1_MSICAL3_2 (0x04UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000004…
20831 #define RCC_ICSCR1_MSICAL3_3 (0x08UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000008…
20832 #define RCC_ICSCR1_MSICAL3_4 (0x10UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000010…
Dstm32u5a9xx.h20451 #define RCC_ICSCR1_MSICAL3_Pos (0U) macro
20452 #define RCC_ICSCR1_MSICAL3_Msk (0x1FUL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x0000001F…
20454 #define RCC_ICSCR1_MSICAL3_0 (0x01UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000001…
20455 #define RCC_ICSCR1_MSICAL3_1 (0x02UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000002…
20456 #define RCC_ICSCR1_MSICAL3_2 (0x04UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000004…
20457 #define RCC_ICSCR1_MSICAL3_3 (0x08UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000008…
20458 #define RCC_ICSCR1_MSICAL3_4 (0x10UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000010…
Dstm32u5g9xx.h21387 #define RCC_ICSCR1_MSICAL3_Pos (0U) macro
21388 #define RCC_ICSCR1_MSICAL3_Msk (0x1FUL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x0000001F…
21390 #define RCC_ICSCR1_MSICAL3_0 (0x01UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000001…
21391 #define RCC_ICSCR1_MSICAL3_1 (0x02UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000002…
21392 #define RCC_ICSCR1_MSICAL3_2 (0x04UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000004…
21393 #define RCC_ICSCR1_MSICAL3_3 (0x08UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000008…
21394 #define RCC_ICSCR1_MSICAL3_4 (0x10UL << RCC_ICSCR1_MSICAL3_Pos) /*!< 0x00000010…