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Searched refs:RCC_CFGR_MCO1SEL_Pos (Results 1 – 7 of 7) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h5061 #define RCC_CFGR_MCO1SEL_Pos (24U) macro
5062 #define RCC_CFGR_MCO1SEL_Msk (0xFUL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x0F000000 */
5064 #define RCC_CFGR_MCO1SEL_0 (0x1UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x01000000 */
5065 #define RCC_CFGR_MCO1SEL_1 (0x2UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x02000000 */
5066 #define RCC_CFGR_MCO1SEL_2 (0x4UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x04000000 */
5067 #define RCC_CFGR_MCO1SEL_3 (0x8UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x08000000 */
Dstm32u083xx.h5826 #define RCC_CFGR_MCO1SEL_Pos (24U) macro
5827 #define RCC_CFGR_MCO1SEL_Msk (0xFUL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x0F000000 */
5829 #define RCC_CFGR_MCO1SEL_0 (0x1UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x01000000 */
5830 #define RCC_CFGR_MCO1SEL_1 (0x2UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x02000000 */
5831 #define RCC_CFGR_MCO1SEL_2 (0x4UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x04000000 */
5832 #define RCC_CFGR_MCO1SEL_3 (0x8UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x08000000 */
Dstm32u073xx.h5568 #define RCC_CFGR_MCO1SEL_Pos (24U) macro
5569 #define RCC_CFGR_MCO1SEL_Msk (0xFUL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x0F000000 */
5571 #define RCC_CFGR_MCO1SEL_0 (0x1UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x01000000 */
5572 #define RCC_CFGR_MCO1SEL_1 (0x2UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x02000000 */
5573 #define RCC_CFGR_MCO1SEL_2 (0x4UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x04000000 */
5574 #define RCC_CFGR_MCO1SEL_3 (0x8UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x08000000 */
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h14653 #define RCC_CFGR_MCO1SEL_Pos (22U) macro
14654 #define RCC_CFGR_MCO1SEL_Msk (0x7UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x01C00000 */
14656 #define RCC_CFGR_MCO1SEL_0 (0x1UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x00400000 */
14657 #define RCC_CFGR_MCO1SEL_1 (0x2UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x00800000 */
14658 #define RCC_CFGR_MCO1SEL_2 (0x4UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x01000000 */
Dstm32h7s7xx.h15687 #define RCC_CFGR_MCO1SEL_Pos (22U) macro
15688 #define RCC_CFGR_MCO1SEL_Msk (0x7UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x01C00000 */
15690 #define RCC_CFGR_MCO1SEL_0 (0x1UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x00400000 */
15691 #define RCC_CFGR_MCO1SEL_1 (0x2UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x00800000 */
15692 #define RCC_CFGR_MCO1SEL_2 (0x4UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x01000000 */
Dstm32h7s3xx.h15285 #define RCC_CFGR_MCO1SEL_Pos (22U) macro
15286 #define RCC_CFGR_MCO1SEL_Msk (0x7UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x01C00000 */
15288 #define RCC_CFGR_MCO1SEL_0 (0x1UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x00400000 */
15289 #define RCC_CFGR_MCO1SEL_1 (0x2UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x00800000 */
15290 #define RCC_CFGR_MCO1SEL_2 (0x4UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x01000000 */
Dstm32h7r7xx.h15053 #define RCC_CFGR_MCO1SEL_Pos (22U) macro
15054 #define RCC_CFGR_MCO1SEL_Msk (0x7UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x01C00000 */
15056 #define RCC_CFGR_MCO1SEL_0 (0x1UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x00400000 */
15057 #define RCC_CFGR_MCO1SEL_1 (0x2UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x00800000 */
15058 #define RCC_CFGR_MCO1SEL_2 (0x4UL << RCC_CFGR_MCO1SEL_Pos) /*!< 0x01000000 */