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Searched refs:RCC_CFGR_ADCPRE_DIV6 (Results 1 – 20 of 20) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_rcc.h320 #define LL_RCC_ADC_CLKSRC_PCLK2_DIV_6 RCC_CFGR_ADCPRE_DIV6 /*ADC prescaler PCLK2 divided by 6*/
Dstm32f1xx_hal_rcc_ex.h351 #define RCC_ADCPCLK2_DIV6 RCC_CFGR_ADCPRE_DIV6
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_rcc.h465 #define LL_RCC_ADC_CLKSRC_PCLK2_DIV_6 RCC_CFGR_ADCPRE_DIV6 /*!< ADC prescaler PCLK divided …
Dstm32f3xx_hal_rcc_ex.h1674 #define RCC_ADC1PCLK2_DIV6 RCC_CFGR_ADCPRE_DIV6
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h889 #define RCC_CFGR_ADCPRE_DIV6 0x00008000U /*!< PCLK2 divided b… macro
Dstm32f101xb.h904 #define RCC_CFGR_ADCPRE_DIV6 0x00008000U /*!< PCLK2 divided b… macro
Dstm32f100xb.h964 #define RCC_CFGR_ADCPRE_DIV6 0x00008000U /*!< PCLK2 divided b… macro
Dstm32f102x6.h929 #define RCC_CFGR_ADCPRE_DIV6 0x00008000U /*!< PCLK2 divided b… macro
Dstm32f100xe.h1233 #define RCC_CFGR_ADCPRE_DIV6 0x00008000U /*!< PCLK2 divided b… macro
Dstm32f101xg.h1258 #define RCC_CFGR_ADCPRE_DIV6 0x00008000U /*!< PCLK2 divided b… macro
Dstm32f101xe.h1233 #define RCC_CFGR_ADCPRE_DIV6 0x00008000U /*!< PCLK2 divided b… macro
Dstm32f102xb.h942 #define RCC_CFGR_ADCPRE_DIV6 0x00008000U /*!< PCLK2 divided b… macro
Dstm32f103x6.h1004 #define RCC_CFGR_ADCPRE_DIV6 0x00008000U /*!< PCLK2 divided b… macro
Dstm32f103xb.h1019 #define RCC_CFGR_ADCPRE_DIV6 0x00008000U /*!< PCLK2 divided b… macro
Dstm32f103xe.h1388 #define RCC_CFGR_ADCPRE_DIV6 0x00008000U /*!< PCLK2 divided b… macro
Dstm32f103xg.h1407 #define RCC_CFGR_ADCPRE_DIV6 0x00008000U /*!< PCLK2 divided b… macro
Dstm32f105xc.h1391 #define RCC_CFGR_ADCPRE_DIV6 0x00008000U /*!< PCLK2 divided b… macro
Dstm32f107xc.h1471 #define RCC_CFGR_ADCPRE_DIV6 0x00008000U /*!< PCLK2 divided b… macro
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f378xx.h7593 #define RCC_CFGR_ADCPRE_DIV6 (0x00008000U) /*!< ADC CLK divided… macro
Dstm32f373xc.h7675 #define RCC_CFGR_ADCPRE_DIV6 (0x00008000U) /*!< ADC CLK divided… macro