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Searched refs:RCC_CFGR3_PPRE3_Pos (Results 1 – 14 of 14) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc.c1851 …rn (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR3 & RCC_CFGR3_PPRE3) >> RCC_CFGR3_PPRE3_Pos]); in HAL_RCC_GetPCLK3Freq()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_rcc.h1372 RCC_CFGR3_PPRE3_Pos])
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h14457 #define RCC_CFGR3_PPRE3_Pos (4U) macro
14458 #define RCC_CFGR3_PPRE3_Msk (0x7UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000070…
14460 #define RCC_CFGR3_PPRE3_0 (0x1UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000010…
14461 #define RCC_CFGR3_PPRE3_1 (0x2UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000020…
14462 #define RCC_CFGR3_PPRE3_2 (0x4UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000040…
Dstm32u535xx.h13944 #define RCC_CFGR3_PPRE3_Pos (4U) macro
13945 #define RCC_CFGR3_PPRE3_Msk (0x7UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000070…
13947 #define RCC_CFGR3_PPRE3_0 (0x1UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000010…
13948 #define RCC_CFGR3_PPRE3_1 (0x2UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000020…
13949 #define RCC_CFGR3_PPRE3_2 (0x4UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000040…
Dstm32u575xx.h15352 #define RCC_CFGR3_PPRE3_Pos (4U) macro
15353 #define RCC_CFGR3_PPRE3_Msk (0x7UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000070…
15355 #define RCC_CFGR3_PPRE3_0 (0x1UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000010…
15356 #define RCC_CFGR3_PPRE3_1 (0x2UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000020…
15357 #define RCC_CFGR3_PPRE3_2 (0x4UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000040…
Dstm32u585xx.h15914 #define RCC_CFGR3_PPRE3_Pos (4U) macro
15915 #define RCC_CFGR3_PPRE3_Msk (0x7UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000070…
15917 #define RCC_CFGR3_PPRE3_0 (0x1UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000010…
15918 #define RCC_CFGR3_PPRE3_1 (0x2UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000020…
15919 #define RCC_CFGR3_PPRE3_2 (0x4UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000040…
Dstm32u595xx.h16380 #define RCC_CFGR3_PPRE3_Pos (4U) macro
16381 #define RCC_CFGR3_PPRE3_Msk (0x7UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000070…
16383 #define RCC_CFGR3_PPRE3_0 (0x1UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000010…
16384 #define RCC_CFGR3_PPRE3_1 (0x2UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000020…
16385 #define RCC_CFGR3_PPRE3_2 (0x4UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000040…
Dstm32u5a5xx.h16942 #define RCC_CFGR3_PPRE3_Pos (4U) macro
16943 #define RCC_CFGR3_PPRE3_Msk (0x7UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000070…
16945 #define RCC_CFGR3_PPRE3_0 (0x1UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000010…
16946 #define RCC_CFGR3_PPRE3_1 (0x2UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000020…
16947 #define RCC_CFGR3_PPRE3_2 (0x4UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000040…
Dstm32u5f7xx.h17913 #define RCC_CFGR3_PPRE3_Pos (4U) macro
17914 #define RCC_CFGR3_PPRE3_Msk (0x7UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000070…
17916 #define RCC_CFGR3_PPRE3_0 (0x1UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000010…
17917 #define RCC_CFGR3_PPRE3_1 (0x2UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000020…
17918 #define RCC_CFGR3_PPRE3_2 (0x4UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000040…
Dstm32u599xx.h20106 #define RCC_CFGR3_PPRE3_Pos (4U) macro
20107 #define RCC_CFGR3_PPRE3_Msk (0x7UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000070…
20109 #define RCC_CFGR3_PPRE3_0 (0x1UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000010…
20110 #define RCC_CFGR3_PPRE3_1 (0x2UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000020…
20111 #define RCC_CFGR3_PPRE3_2 (0x4UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000040…
Dstm32u5g7xx.h18475 #define RCC_CFGR3_PPRE3_Pos (4U) macro
18476 #define RCC_CFGR3_PPRE3_Msk (0x7UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000070…
18478 #define RCC_CFGR3_PPRE3_0 (0x1UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000010…
18479 #define RCC_CFGR3_PPRE3_1 (0x2UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000020…
18480 #define RCC_CFGR3_PPRE3_2 (0x4UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000040…
Dstm32u5f9xx.h21042 #define RCC_CFGR3_PPRE3_Pos (4U) macro
21043 #define RCC_CFGR3_PPRE3_Msk (0x7UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000070…
21045 #define RCC_CFGR3_PPRE3_0 (0x1UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000010…
21046 #define RCC_CFGR3_PPRE3_1 (0x2UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000020…
21047 #define RCC_CFGR3_PPRE3_2 (0x4UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000040…
Dstm32u5a9xx.h20668 #define RCC_CFGR3_PPRE3_Pos (4U) macro
20669 #define RCC_CFGR3_PPRE3_Msk (0x7UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000070…
20671 #define RCC_CFGR3_PPRE3_0 (0x1UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000010…
20672 #define RCC_CFGR3_PPRE3_1 (0x2UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000020…
20673 #define RCC_CFGR3_PPRE3_2 (0x4UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000040…
Dstm32u5g9xx.h21604 #define RCC_CFGR3_PPRE3_Pos (4U) macro
21605 #define RCC_CFGR3_PPRE3_Msk (0x7UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000070…
21607 #define RCC_CFGR3_PPRE3_0 (0x1UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000010…
21608 #define RCC_CFGR3_PPRE3_1 (0x2UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000020…
21609 #define RCC_CFGR3_PPRE3_2 (0x4UL << RCC_CFGR3_PPRE3_Pos) /*!< 0x00000040…