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Searched refs:RCC_CFGR2_AHB2DIS1 (Results 1 – 14 of 14) sorted by relevance

/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_bus.h779 CLEAR_BIT(RCC->CFGR2, RCC_CFGR2_AHB2DIS1); in LL_AHB2_GRP1_EnableBusClock()
780 tmpreg = READ_BIT(RCC->CFGR2, RCC_CFGR2_AHB2DIS1); in LL_AHB2_GRP1_EnableBusClock()
928 SET_BIT(RCC->CFGR2, RCC_CFGR2_AHB2DIS1); in LL_AHB2_GRP1_DisableBusClock()
Dstm32u5xx_hal_rcc.h1290 #define __HAL_RCC_AHB2_1_CLK_DISABLE() SET_BIT(RCC->CFGR2, RCC_CFGR2_AHB2DIS1);
1311 CLEAR_BIT(RCC->CFGR2, RCC_CFGR2_AHB2DIS1); \
1312 tmpreg = READ_BIT(RCC->CFGR2, RCC_CFGR2_AHB2DIS1); \
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h14444 #define RCC_CFGR2_AHB2DIS1 RCC_CFGR2_AHB2DIS1_Msk /*!< AHB2 clock… macro
Dstm32u535xx.h13931 #define RCC_CFGR2_AHB2DIS1 RCC_CFGR2_AHB2DIS1_Msk /*!< AHB2 clock… macro
Dstm32u575xx.h15339 #define RCC_CFGR2_AHB2DIS1 RCC_CFGR2_AHB2DIS1_Msk /*!< AHB2 clock… macro
Dstm32u585xx.h15901 #define RCC_CFGR2_AHB2DIS1 RCC_CFGR2_AHB2DIS1_Msk /*!< AHB2 clock… macro
Dstm32u595xx.h16367 #define RCC_CFGR2_AHB2DIS1 RCC_CFGR2_AHB2DIS1_Msk /*!< AHB2 clock… macro
Dstm32u5a5xx.h16929 #define RCC_CFGR2_AHB2DIS1 RCC_CFGR2_AHB2DIS1_Msk /*!< AHB2 clock… macro
Dstm32u5f7xx.h17900 #define RCC_CFGR2_AHB2DIS1 RCC_CFGR2_AHB2DIS1_Msk /*!< AHB2 clock… macro
Dstm32u599xx.h20093 #define RCC_CFGR2_AHB2DIS1 RCC_CFGR2_AHB2DIS1_Msk /*!< AHB2 clock… macro
Dstm32u5g7xx.h18462 #define RCC_CFGR2_AHB2DIS1 RCC_CFGR2_AHB2DIS1_Msk /*!< AHB2 clock… macro
Dstm32u5f9xx.h21029 #define RCC_CFGR2_AHB2DIS1 RCC_CFGR2_AHB2DIS1_Msk /*!< AHB2 clock… macro
Dstm32u5a9xx.h20655 #define RCC_CFGR2_AHB2DIS1 RCC_CFGR2_AHB2DIS1_Msk /*!< AHB2 clock… macro
Dstm32u5g9xx.h21591 #define RCC_CFGR2_AHB2DIS1 RCC_CFGR2_AHB2DIS1_Msk /*!< AHB2 clock… macro