Searched refs:RCC_CFGR2_ADCPRE12_DIV256 (Results 1 – 11 of 11) sorted by relevance
509 …12_CLKSRC_PLL_DIV_256 (uint32_t)((RCC_CFGR2_ADCPRE12 << 16U) | RCC_CFGR2_ADCPRE12_DIV256) /*!< AD…550 #define LL_RCC_ADC12_CLKSRC_PLL_DIV_256 RCC_CFGR2_ADCPRE12_DIV256 /*!< ADC12 PLL clock divided by …
1327 #define RCC_ADC12PLLCLK_DIV256 RCC_CFGR2_ADCPRE12_DIV2561429 #define RCC_ADC12PLLCLK_DIV256 RCC_CFGR2_ADCPRE12_DIV2561611 #define RCC_ADC12PLLCLK_DIV256 RCC_CFGR2_ADCPRE12_DIV256
8842 #define RCC_CFGR2_ADCPRE12_DIV256 (0x000001B0U) /*!< ADC12 PLL clock… macro
9161 #define RCC_CFGR2_ADCPRE12_DIV256 (0x000001B0U) /*!< ADC12 PLL clock… macro
8869 #define RCC_CFGR2_ADCPRE12_DIV256 (0x000001B0U) /*!< ADC12 PLL clock… macro
9664 #define RCC_CFGR2_ADCPRE12_DIV256 (0x000001B0U) /*!< ADC12 PLL clock… macro
9767 #define RCC_CFGR2_ADCPRE12_DIV256 (0x000001B0U) /*!< ADC12 PLL clock… macro
10794 #define RCC_CFGR2_ADCPRE12_DIV256 (0x000001B0U) /*!< ADC12 PLL clock… macro
11378 #define RCC_CFGR2_ADCPRE12_DIV256 (0x000001B0U) /*!< ADC12 PLL clock… macro
11273 #define RCC_CFGR2_ADCPRE12_DIV256 (0x000001B0U) /*!< ADC12 PLL clock… macro
11971 #define RCC_CFGR2_ADCPRE12_DIV256 (0x000001B0U) /*!< ADC12 PLL clock… macro
