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Searched refs:RCC_CFGR1_SWS_Msk (Results 1 – 23 of 23) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h5943 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
5944 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32wba52xx.h9717 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
9718 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32wba54xx.h9989 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
9990 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32wba5mxx.h10007 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
10008 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32wba55xx.h10007 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
10008 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h8374 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x00000018… macro
8375 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32h523xx.h12511 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x00000018… macro
12512 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32h562xx.h13191 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x00000018… macro
13192 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32h533xx.h13030 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x00000018… macro
13031 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32h573xx.h15794 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x00000018… macro
15795 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32h563xx.h15275 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x00000018… macro
15276 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h14391 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
14392 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32u535xx.h13878 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
13879 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32u575xx.h15286 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
15287 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32u585xx.h15848 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
15849 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32u595xx.h16314 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
16315 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32u5a5xx.h16876 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
16877 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32u5f7xx.h17840 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
17841 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32u599xx.h20033 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
20034 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32u5g7xx.h18402 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
18403 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32u5f9xx.h20969 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
20970 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32u5a9xx.h20595 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
20596 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…
Dstm32u5g9xx.h21531 #define RCC_CFGR1_SWS_Msk (0x3UL << RCC_CFGR1_SWS_Pos) /*!< 0x0000000C… macro
21532 #define RCC_CFGR1_SWS RCC_CFGR1_SWS_Msk /*!< SWS[1:0] b…