Searched refs:RCC_CCIPR_ADC345SEL_Pos (Results 1 – 9 of 9) sorted by relevance
453 …RCE_NONE (((uint32_t)RCC_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC345SEL_Pos << 16U)) …454 …_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC345SEL_Pos << 16U) | (RCC_CCIPR_ADC345SEL_0 >> RCC…455 …_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC345SEL_Pos << 16U) | (RCC_CCIPR_ADC345SEL_1 >> RCC…575 #if defined(RCC_CCIPR_ADC345SEL_Pos)576 …C_OFFSET_CCIPR << 24U) | ((uint32_t)RCC_CCIPR_ADC345SEL_Pos << 16U) | (RCC_CCIPR_ADC345SEL >> RCC_…
8079 #define RCC_CCIPR_ADC345SEL_Pos (30U) macro8080 #define RCC_CCIPR_ADC345SEL_Msk (0x3UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x80000000 */8082 #define RCC_CCIPR_ADC345SEL_0 (0x1UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x40000000 */8083 #define RCC_CCIPR_ADC345SEL_1 (0x2UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x80000000 */
8730 #define RCC_CCIPR_ADC345SEL_Pos (30U) macro8731 #define RCC_CCIPR_ADC345SEL_Msk (0x3UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x80000000 */8733 #define RCC_CCIPR_ADC345SEL_0 (0x1UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x40000000 */8734 #define RCC_CCIPR_ADC345SEL_1 (0x2UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x80000000 */
8500 #define RCC_CCIPR_ADC345SEL_Pos (30U) macro8501 #define RCC_CCIPR_ADC345SEL_Msk (0x3UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x80000000 */8503 #define RCC_CCIPR_ADC345SEL_0 (0x1UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x40000000 */8504 #define RCC_CCIPR_ADC345SEL_1 (0x2UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x80000000 */
9217 #define RCC_CCIPR_ADC345SEL_Pos (30U) macro9218 #define RCC_CCIPR_ADC345SEL_Msk (0x3UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x80000000 */9220 #define RCC_CCIPR_ADC345SEL_0 (0x1UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x40000000 */9221 #define RCC_CCIPR_ADC345SEL_1 (0x2UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x80000000 */
8667 #define RCC_CCIPR_ADC345SEL_Pos (30U) macro8668 #define RCC_CCIPR_ADC345SEL_Msk (0x3UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x80000000 */8670 #define RCC_CCIPR_ADC345SEL_0 (0x1UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x40000000 */8671 #define RCC_CCIPR_ADC345SEL_1 (0x2UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x80000000 */
9447 #define RCC_CCIPR_ADC345SEL_Pos (30U) macro9448 #define RCC_CCIPR_ADC345SEL_Msk (0x3UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x80000000 */9450 #define RCC_CCIPR_ADC345SEL_0 (0x1UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x40000000 */9451 #define RCC_CCIPR_ADC345SEL_1 (0x2UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x80000000 */
12796 #define RCC_CCIPR_ADC345SEL_Pos (30U) macro12797 #define RCC_CCIPR_ADC345SEL_Msk (0x3UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x80000000 */12799 #define RCC_CCIPR_ADC345SEL_0 (0x1UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x40000000 */12800 #define RCC_CCIPR_ADC345SEL_1 (0x2UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x80000000 */
13026 #define RCC_CCIPR_ADC345SEL_Pos (30U) macro13027 #define RCC_CCIPR_ADC345SEL_Msk (0x3UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x80000000 */13029 #define RCC_CCIPR_ADC345SEL_0 (0x1UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x40000000 */13030 #define RCC_CCIPR_ADC345SEL_1 (0x2UL << RCC_CCIPR_ADC345SEL_Pos) /*!< 0x80000000 */
