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Searched refs:RCC_CCIPR3_LPTIM1SEL (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc_ex.h352 #define RCC_LPTIM1CLKSOURCE_LSE RCC_CCIPR3_LPTIM1SEL
719 MODIFY_REG(RCC->CCIPR3, RCC_CCIPR3_LPTIM1SEL, (__LPTIM1_CLKSOURCE__))
728 #define __HAL_RCC_GET_LPTIM1_SOURCE() READ_BIT(RCC->CCIPR3, RCC_CCIPR3_LPTIM1SEL)
Dstm32wbaxx_ll_rcc.h464 …(RCC_OFFSET_CCIPR3 << 24U) | (RCC_CCIPR3_LPTIM1SEL_Pos << 16U) | (RCC_CCIPR3_LPTIM1SEL >> RCC_CCIP…
576 …(RCC_OFFSET_CCIPR3 << 24U) | (RCC_CCIPR3_LPTIM1SEL_Pos << 16U) | (RCC_CCIPR3_LPTIM1SEL >> RCC_CCIP…
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc_ex.h771 #define RCC_LPTIM1CLKSOURCE_LSE RCC_CCIPR3_LPTIM1SEL
1512 MODIFY_REG(RCC->CCIPR3, RCC_CCIPR3_LPTIM1SEL, (uint32_t)(__LPTIM1_CLKSOURCE__))
1521 #define __HAL_RCC_GET_LPTIM1_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR3, RCC_CCIPR3_LPTIM1SEL)))
Dstm32u5xx_ll_rcc.h605 …(RCC_CCIPR3_LPTIM1SEL >> RCC_CCIPR3_LPTIM1SEL_Pos)) /*!< LSE clock used as LPTIM1 clock sourc…
903 … (RCC_CCIPR3_LPTIM1SEL >> RCC_CCIPR3_LPTIM1SEL_Pos)) /*!< LPTIM1 Clock source selection */
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_rcc_ex.c507 PeriphClkInit->Lptim1ClockSelection = (tmpreg & RCC_CCIPR3_LPTIM1SEL); in HAL_RCCEx_GetPeriphCLKConfig()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h6465 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk macro
Dstm32wba52xx.h10334 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk macro
Dstm32wba54xx.h10653 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk macro
Dstm32wba5mxx.h10671 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk macro
Dstm32wba55xx.h10671 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h15739 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk /*!< LPTIM1SEL… macro
Dstm32u535xx.h15187 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk /*!< LPTIM1SEL… macro
Dstm32u575xx.h16702 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk /*!< LPTIM1SEL… macro
Dstm32u585xx.h17312 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk /*!< LPTIM1SEL… macro
Dstm32u595xx.h17812 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk /*!< LPTIM1SEL… macro
Dstm32u5a5xx.h18422 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk /*!< LPTIM1SEL… macro
Dstm32u5f7xx.h19405 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk /*!< LPTIM1SEL… macro
Dstm32u599xx.h21586 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk /*!< LPTIM1SEL… macro
Dstm32u5g7xx.h20015 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk /*!< LPTIM1SEL… macro
Dstm32u5f9xx.h22546 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk /*!< LPTIM1SEL… macro
Dstm32u5a9xx.h22196 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk /*!< LPTIM1SEL… macro
Dstm32u5g9xx.h23156 #define RCC_CCIPR3_LPTIM1SEL RCC_CCIPR3_LPTIM1SEL_Msk /*!< LPTIM1SEL… macro