Searched refs:RCC_CCIPR2_USBPHYCSEL_1 (Results 1 – 10 of 10) sorted by relevance
953 #define RCC_USBPHYCLKSOURCE_HSE_DIV2 RCC_CCIPR2_USBPHYCSEL_1 /*!< HSE clock divided by 2 sel…955 #define RCC_USBPHYCLKSOURCE_PLL1_DIV2 (RCC_CCIPR2_USBPHYCSEL_1 | RCC_CCIPR2_USBPHYCSEL_0) /*!< PLL…
868 #define LL_RCC_USBPHYCLKSOURCE_HSE_DIV2 RCC_CCIPR2_USBPHYCSEL_1 /*!< HSE clock divi…870 #define LL_RCC_USBPHYCLKSOURCE_PLL1_DIV2 (RCC_CCIPR2_USBPHYCSEL_1 | RCC_CCIPR2_USBPHYCSEL_…
17786 #define RCC_CCIPR2_USBPHYCSEL_1 (0x2UL << RCC_CCIPR2_USBPHYCSEL_Pos) /*!< 0x8000000… macro
18396 #define RCC_CCIPR2_USBPHYCSEL_1 (0x2UL << RCC_CCIPR2_USBPHYCSEL_Pos) /*!< 0x8000000… macro
19379 #define RCC_CCIPR2_USBPHYCSEL_1 (0x2UL << RCC_CCIPR2_USBPHYCSEL_Pos) /*!< 0x8000000… macro
21560 #define RCC_CCIPR2_USBPHYCSEL_1 (0x2UL << RCC_CCIPR2_USBPHYCSEL_Pos) /*!< 0x8000000… macro
19989 #define RCC_CCIPR2_USBPHYCSEL_1 (0x2UL << RCC_CCIPR2_USBPHYCSEL_Pos) /*!< 0x8000000… macro
22520 #define RCC_CCIPR2_USBPHYCSEL_1 (0x2UL << RCC_CCIPR2_USBPHYCSEL_Pos) /*!< 0x8000000… macro
22170 #define RCC_CCIPR2_USBPHYCSEL_1 (0x2UL << RCC_CCIPR2_USBPHYCSEL_Pos) /*!< 0x8000000… macro
23130 #define RCC_CCIPR2_USBPHYCSEL_1 (0x2UL << RCC_CCIPR2_USBPHYCSEL_Pos) /*!< 0x8000000… macro
