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Searched refs:RCC_CCIPR2_SAI2SEL_Pos (Results 1 – 20 of 20) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h12285 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
12286 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000700 */
12288 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000100 */
12289 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000200 */
12290 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000400 */
Dstm32l562xx.h13015 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
13016 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000700 */
13018 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000100 */
13019 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000200 */
13020 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l4r5xx.h12979 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
12980 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000700 */
12982 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000100 */
12983 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000200 */
12984 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000400 */
Dstm32l4r7xx.h13478 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
13479 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000700 */
13481 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000100 */
13482 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000200 */
13483 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000400 */
Dstm32l4s5xx.h13326 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
13327 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000700 */
13329 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000100 */
13330 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000200 */
13331 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000400 */
Dstm32l4s7xx.h13825 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
13826 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000700 */
13828 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000100 */
13829 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000200 */
13830 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000400 */
Dstm32l4p5xx.h13796 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
13797 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000700 */
13799 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000100 */
13800 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000200 */
13801 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000400 */
Dstm32l4q5xx.h14307 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
14308 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000700 */
14310 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000100 */
14311 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000200 */
14312 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000400 */
Dstm32l4r9xx.h16606 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
16607 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000700 */
16609 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000100 */
16610 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000200 */
16611 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000400 */
Dstm32l4s9xx.h16953 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
16954 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000700 */
16956 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000100 */
16957 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000200 */
16958 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u575xx.h16658 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
16659 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000070…
16661 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000010…
16662 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000020…
16663 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000040…
Dstm32u585xx.h17265 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
17266 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000070…
17268 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000010…
17269 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000020…
17270 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000040…
Dstm32u595xx.h17743 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
17744 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000070…
17746 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000010…
17747 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000020…
17748 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000040…
Dstm32u5a5xx.h18350 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
18351 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000070…
18353 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000010…
18354 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000020…
18355 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000040…
Dstm32u5f7xx.h19333 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
19334 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000070…
19336 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000010…
19337 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000020…
19338 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000040…
Dstm32u599xx.h21511 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
21512 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000070…
21514 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000010…
21515 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000020…
21516 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000040…
Dstm32u5g7xx.h19940 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
19941 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000070…
19943 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000010…
19944 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000020…
19945 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000040…
Dstm32u5f9xx.h22471 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
22472 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000070…
22474 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000010…
22475 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000020…
22476 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000040…
Dstm32u5a9xx.h22118 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
22119 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000070…
22121 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000010…
22122 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000020…
22123 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000040…
Dstm32u5g9xx.h23078 #define RCC_CCIPR2_SAI2SEL_Pos (8U) macro
23079 #define RCC_CCIPR2_SAI2SEL_Msk (0x7UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000070…
23081 #define RCC_CCIPR2_SAI2SEL_0 (0x1UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000010…
23082 #define RCC_CCIPR2_SAI2SEL_1 (0x2UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000020…
23083 #define RCC_CCIPR2_SAI2SEL_2 (0x4UL << RCC_CCIPR2_SAI2SEL_Pos) /*!< 0x0000040…