Searched refs:RCC_CCIPR2_I2C6SEL_Pos (Results 1 – 9 of 9) sorted by relevance
556 #define LL_RCC_I2C6_CLKSOURCE_PCLK1 ((RCC_OFFSET_CCIPR2 << 24U) | (RCC_CCIPR2_I2C6SEL_Pos <…557 #define LL_RCC_I2C6_CLKSOURCE_SYSCLK ((RCC_OFFSET_CCIPR2 << 24U) | (RCC_CCIPR2_I2C6SEL_Pos <…558 … (RCC_CCIPR2_I2C6SEL_0 >> RCC_CCIPR2_I2C6SEL_Pos)) /*!< SYSCLK clock used as I2C6 clock source */559 #define LL_RCC_I2C6_CLKSOURCE_HSI ((RCC_OFFSET_CCIPR2 << 24U) | (RCC_CCIPR2_I2C6SEL_Pos <…560 … (RCC_CCIPR2_I2C6SEL_1 >> RCC_CCIPR2_I2C6SEL_Pos)) /*!< HSI clock used as I2C6 clock source */561 #define LL_RCC_I2C6_CLKSOURCE_MSIK ((RCC_OFFSET_CCIPR2 << 24U) | (RCC_CCIPR2_I2C6SEL_Pos <…562 … (RCC_CCIPR2_I2C6SEL >> RCC_CCIPR2_I2C6SEL_Pos)) /*!< MSIK clock used as I2C6 clock source */892 #define LL_RCC_I2C6_CLKSOURCE ((RCC_OFFSET_CCIPR2 << 24U) | (RCC_CCIPR2_I2C6SEL_Pos << …893 … (RCC_CCIPR2_I2C6SEL >> RCC_CCIPR2_I2C6SEL_Pos)) /*!< I2C1 Clock source selection */
17777 #define RCC_CCIPR2_I2C6SEL_Pos (26U) macro17778 #define RCC_CCIPR2_I2C6SEL_Msk (0x3UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0C00000…17780 #define RCC_CCIPR2_I2C6SEL_0 (0x1UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0400000…17781 #define RCC_CCIPR2_I2C6SEL_1 (0x2UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0800000…
18387 #define RCC_CCIPR2_I2C6SEL_Pos (26U) macro18388 #define RCC_CCIPR2_I2C6SEL_Msk (0x3UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0C00000…18390 #define RCC_CCIPR2_I2C6SEL_0 (0x1UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0400000…18391 #define RCC_CCIPR2_I2C6SEL_1 (0x2UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0800000…
19370 #define RCC_CCIPR2_I2C6SEL_Pos (26U) macro19371 #define RCC_CCIPR2_I2C6SEL_Msk (0x3UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0C00000…19373 #define RCC_CCIPR2_I2C6SEL_0 (0x1UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0400000…19374 #define RCC_CCIPR2_I2C6SEL_1 (0x2UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0800000…
21551 #define RCC_CCIPR2_I2C6SEL_Pos (26U) macro21552 #define RCC_CCIPR2_I2C6SEL_Msk (0x3UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0C00000…21554 #define RCC_CCIPR2_I2C6SEL_0 (0x1UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0400000…21555 #define RCC_CCIPR2_I2C6SEL_1 (0x2UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0800000…
19980 #define RCC_CCIPR2_I2C6SEL_Pos (26U) macro19981 #define RCC_CCIPR2_I2C6SEL_Msk (0x3UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0C00000…19983 #define RCC_CCIPR2_I2C6SEL_0 (0x1UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0400000…19984 #define RCC_CCIPR2_I2C6SEL_1 (0x2UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0800000…
22511 #define RCC_CCIPR2_I2C6SEL_Pos (26U) macro22512 #define RCC_CCIPR2_I2C6SEL_Msk (0x3UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0C00000…22514 #define RCC_CCIPR2_I2C6SEL_0 (0x1UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0400000…22515 #define RCC_CCIPR2_I2C6SEL_1 (0x2UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0800000…
22161 #define RCC_CCIPR2_I2C6SEL_Pos (26U) macro22162 #define RCC_CCIPR2_I2C6SEL_Msk (0x3UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0C00000…22164 #define RCC_CCIPR2_I2C6SEL_0 (0x1UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0400000…22165 #define RCC_CCIPR2_I2C6SEL_1 (0x2UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0800000…
23121 #define RCC_CCIPR2_I2C6SEL_Pos (26U) macro23122 #define RCC_CCIPR2_I2C6SEL_Msk (0x3UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0C00000…23124 #define RCC_CCIPR2_I2C6SEL_0 (0x1UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0400000…23125 #define RCC_CCIPR2_I2C6SEL_1 (0x2UL << RCC_CCIPR2_I2C6SEL_Pos) /*!< 0x0800000…
